Three pillars of intent-focused insight: Verification Futures 2022

Harry D. Foster, Chief Scientist Verification, Siemens Digital Industries Software, presented the three pillars of intent-focused insight at the Verification Futures 2022.

The 1997 SEMATECH sets off an alarm about the design productivity gap. It was solved through IP re-use and improvements in EDA. A more ominous productivity gap has emerged with respect to verification. Today, it is becoming much more expensive to verify and validate new chips.

FPGA projects are performing no better than ASIC. 83 percent of FPGA design projects have non-trivial bug escapes into production. Logic/functional failures are consistently the top cause of respins. While design engineers have increased by 32 percent, verification engineers have increased by 138 percent from 2007-2020. We must remember that missed schedules increase cost.

We need to ensure an independent interpretation of the specification. Increased complexity of verification environments required unique engineering skils. There is the fallacy that quality can be verified into a product. Quality cannot be inspected into a product. It must be built into it! An example is finding and fixing a bug at various development stages for a 5nm ASIC. Project variability undermines success and wastes resources.

We need to improve the register-transfer level (RTL) quality, while reducing bug density with intent-focused insight! That is, design and intent! This involves rethinking the design process to reduce the bug density for downstream verification.

There are three pillars of a design+intent methodology. These are: produce correct intent by construction, prove intent is me, and protect intent throughout the development lifecycle.

100 lines of high-level language (HLL) is equivalent to 1,000 lines of RTL. Expect a 10x reduction in the average number of bugs. 1-5 bugs for HLL design vs. 15-50 bugs for equivalent RTL design. We can close the verification gap through abstraction. Questa design solutions stop design bugs at the source. Verification automation for designers lead to intent-focused insight from creation to completion.

Finding a path out of the verification crisis requires a philosophical change throughout the development lifecycle with a foundation built on bug prevention. To begin this journey, focus on design + intent solutions that promote more consistent development cycles, and faster verification convergence by improving RTL quality.