semiconductor equipment
Pradeep’s Techpoints is media partner for Leti Innovation Days 2024
CEA-Leti, France, is organizing the Leti Innovation Days 2024, June 25-27, at Maison MINATEC Congress Center, Grenoble, France. It is my pleasure to inform you all that Pradeep’s Techpoints is a media partner for the event.
The world needs lower-power, more resource-efficient electronics for an array of use cases. The semiconductor industry is excited about the recent surge in investments. It is very good news for the global semiconductor industry. It will also create unprecedented opportunities. Partnerships will be instrumental to getting relevant, robust, and reliable products to markets faster.
Seven tracks
At Leti Innovation Days 2024, there will be seven tracks. Plenary session is generally the most attended. Other tracks are on: electronics and sustainability, tech for health, 3D heterogeneous integration, sense and act, new materials for computing, and RF and telecommunications.
Besides the plenary, I recommend 3D heterogeneous integration, and new materials for computing, Of course, you have the right to choose your own tracks! 😉
Laith Altimime, President, SEMI Europe, will kick off the plenary, talking about global collaborations enabling $1 trillion by 2030. Fabio Gualandris, President, Quality, Manufacturing & Technology, STMicroelectronics, will speak about innovate, integrate, elevate your lab-to-fab fast track. Sanjay Natarajan, SVP & GM, Components Research, Intel, will discuss the future of compute: accelerating Moore’s Law innovation. David Anderson, President, NY CREATES, and former SEMI USA President, and Coby Hanoch. CEO, Weebit Nano, also have presentations.
Electronics and sustainability track has sessions on water resource and climate resource, respectively. Tech for health track has sessions from Thales, Injectpower, Travera, CEA-Leti, etc. 3D heterogeneous integration track has speakers from Cerebras Systems, IBM Research, Lightmatter, etc. Talks will also be delivered by Prophesee, Siemens EDA, IBM Quantum Computing, CERN, Aledia, etc.
Sense and act track has speakers from STMicroelectronics, TDK, Philips MEMS Foundry, Bosch Sensortec GmbH, Horiba, Leti, etc. New materials for computing track has speakers from Intel, CEA, Aixtron, Tokyo Institute of Technology, ASM, Applied Materials, University of Tokyo, Merck, etc. Finally, the RF and telecommunications track has speakers from Soitec, Leti, Murata, Stellantis, HPE, etc.
The tech exhibition will have 50+ live presentations. One-health demonstrators and CEA-Leti will show technologies for medical imaging, medical devices, pharma, biotech R&D, and environmental monitoring for improved human, animal, and environmental health. Also on display would be the latest silicon breakthroughs and smart system solutions. Startups are crucial to getting new technologies from labs to the market. This year, you don’t want to miss the new LiDAR, sensing, and health startups.
CEA-Leti partners span the entire semiconductor value chain. Partners’ Corner will make their expertise available in one convenient location. CEA-Leti is supported by Carnot network of French RTOs. CEA is a key player in R&D and innovation in four key areas. These are: defense and security, low carbon energies (nuclear and renewables), tech research for industry, and fundamental research in physical sciences and life sciences.
This is my second appearance as media partner, having earlier been associated with Asia Photonics Week 2024, Singapore, March 2024.
Look forward to seeing you all in Grenoble! 😉
Policies and partnerships needed to support semiconductor startups
Semiconductor Industry Association (SIA), USA, organized a seminar on: Encouraging innovation: Policies and partnerships needed to support semiconductor startups.
Startups are a critical part of the semiconductor ecosystem, driving growth and innovation in the industry and exploring new frontiers of chip technology. Unfortunately, startups in the semiconductor sector face significant challenges and barriers to entry. Creative and ambitious policy solutions and expanded public-private collaboration are needed to help semiconductor startups grow and strengthen.
SIA, and Dan Armbrust from Silicon Catalyst—the world’s only incubator and accelerator for startups focused on semiconductor solutions— had a discussion on the opportunities and challenges facing semiconductor startups. They looked at the actions needed to reinforce and expand this important part of the semiconductor ecosystem.
John Neuffer, SIA President, said that we represent two-thirds of the global chip industry. Startups have been an essential part of the ecosystem. There are barriers to entry. We have to overcome them.
Dan Armburst said that company valuations and profitability has seen eight of the top 20 market caps in technology. It is the third most profitable industry. AI is profoundly hardware limited, and it’s the next gold rush. There are essential assets in a geopolitical sea change away from globalism.
Surge of investments are underway. There are CHIPS Act(s) in various countries and regions. VCs are wading back in as there are green shoots in deep tech and specialty funds. We have reasonable M&A and IPO opportunities for startups. Chiplets and advanced packaging can be advantageous for startups.
Semiconductor startups face daunting challenges. There is escalating cost of innovation, with prototyping access and costs. Sustained decline of VC for semiconductors is also there. Achieving product-market fit remains challenging. We have diminished customer appetite to award design wins to startups.
More research will not lead to commercialization, unless, we continue to build startup playbook. We must aggressively implement CHIPS Act investments for prototyping and startup funds with a sense of urgency. We can supplement with existing government programs and funding streams. We need to strengthen the startup ecosystem for translation to industry.
How it all started?
In 1990s, foundry business model was led by TSMC in Taiwan. In 2010s, we had Moore’s Law slowdown, rise of AI, and emergence of Chinese threat, and pricing power. In 2020s, pandemic chips shortages, CHIPS Act(s), China’s access restrictions, and GenAI are in action.
We have been witnessing consolidation and concentration in each segment. These are across chip design costs, DRAM, logic/foundry platforms, and equipment market. Also, scaling is in trouble, as the evidence of Moore’s Law slowdown. We need a very solid roadmap for next decade. We now need CMOS roadmap to <1.0 nm, along with the advances in EUV lithography, advanced packaging, and more backside power distribution.
Today, system companies, such as Apple, Google, Microsoft, Meta, Cisco, Huawei, along with IBM, Samsung, etc., are becoming silicon houses. China export controls and trade restrictions are stressing globalism. VC has also moved past semiconductors to software and services over the years. Investment has been around $6.5 billion, only 2.5 percent of $244.5 billion, in 2022.
VC investment and model
Venture capital investments in AI/ML have escalated. Majority has been in vertical apps. We had the first wave of domain specific accelerators / architectures for AI, largely around edge/cloud. There have been some investments in optical/photonics, in-memory, and neuromorphic chips.
Today’s VC model at a glance suggests goal is return 3-5x or 20-30 percent annual IRR over the 10-year life of the fund. Invest fund in 20-25 companies, which represent 0.1-1 percent of deal flow. Hits-driven business means, we need one-three firms to return 10-100x of investment. VCs are compensated 2 percent of fund annually for opex, and retain 20 percent (carry) of profits. Each startup funding round is lead by a new VC that sets the valuation and investing terms for others. For existing investors, exercising pro-rata rights is key. VCs raise follow-up funds based on track record of prior funds.
VC model dictates where investments are made, and why semiconductors struggle. Investments in semiconductors are less attractive, compared to software and services. Higher capital is required, with longer time to revenue ramp. It has higher innovation failure rates, and longer time to liquidity, and lower returns.
Semiconductors requires extensive and specific due diligence, a skill mostly atrophied. Product-market fit is hard to predict based on early measures of traction and adoption. Incubator and accelerator services have helped startups in other arenas, apart from semiconductors. He said Silicon Catalyst accelerator model is tuned to semiconductor startup needs. Silicon Catalyst services are available from the industry’s ecosystem.
What’s coming up?
Within semiconductors, we have materials/process changes, new materials and devices, new equipment and processes, and EDA for emerging technologies, are coming up in the future.
For substrates, we have SiC, silicon-on-insulator, GaN, compound semiconductors, etc. For wafer fabs, there are patternable materials, planarization materials, gases, cleaning solutions, etc. Device performance has 2D semiconductors, graphene, diamond, ferroelectrics, spintronics, etc. Interconnects have metals, metal oxides, metal barriers, carbon nanotubes, isolation materials, dielectrics, etc. Packaging materials have solders, ceramics, encapsulates, thermal management materials, insulators, etc.
CHIPS Act
CHIPS and Science Act was signed into law in August 2022. Innovation gap is about the CHIPS Act R&D provisions. Gaps are in prototyping at scale, scale-up business model, startup funding, and government-agency coordination.
CHIPS Act Industrial Advisory Committee (IAC) was also set up later. IAC R&D gaps recommendations includes:
- Establish easily accessible prototyping capabilities in multiple facilities and enact the
ability to rapidly try out CMOS+X at a scale that is relevant to industry. - Create a semiverse digital twin.
- Establish chiplets ecosystem and 3D heterogeneous integration platform for chiplet
innovation and advanced packaging. - Build an accessible platform for chip design and enable new EDA tools that treat 3D
(monolithic or stacked) as an intrinsic assumption. - Create a nurturing ecosystem for promising startups.
CHIPStart UK is an example of a fast-moving government-led initiative. Last year, 11 startups were admitted for 9-month program. In Feb. 2024, there was call for second cohort applications.
Recommendations
It is recommended that USA executes what’s been authorized and appropriated with the CHIPS Act. Accelerate access to affordable prototyping capabilities for startups through the various CHIPS Act initiatives. This includes: NSTC for silicon, NAPMP for packaging, and Manufacturing USA for digital twin. DoD Commons (Hubs) for “lab to fab” – 8 regional hubs were launched in Sept. 23. We also have to Implement NSTC’s Innovation fund at minimum of $0.5B consistent with IAC and SCSP recommendations.
We can enhance existing SBIR/STTR and DIU programs with fast-track entrepreneur lane to 3x funding across NSF/DoE/DARPA/DoD/NIH. Leverage ongoing government initiatives by ensuring that startup investment and procurement are included (e.g., DoD NDIS (National Defense Industrial Strategy) and SBICCT (Small Business Investment Company Critical Technologies)), and DoE Office of Science (BES) and AMO funding and loan programs.
We can complement all this by attracting further private investment. Increase corporate VC (CVC) investments by 2x to provide signals to VC for early-stage startups with innovative technologies, especially in materials, metrology, processes and EDA.
We must commission the OSTP to establish means of collaboration with allied nations’ CHIPS Acts and ensure coordination across government agencies on initiatives that support startups. Increase the number of “hard tech” and specialty fund VCs by identifying and addressing gaps in incentives and policies via a neutral technology-based organization (e.g., MITRE, SRI, CoC – Council on Competitiveness). Enhance the capital gains provisions for entrepreneurs and investors that have long liquidity timelines (QSBS – Qualified Small Business Stock for capital gains).
Regarding EDA startups, they face similar problems to semiconductor companies. EDA historically has had significant startup and M&A activity. That has been a significant contributor to how the EDA industry has grown. There are major opportunities in chiplets and advanced packaging enablement, moving forward, and the use of AI to improve designer productivity.
Regarding agencies response to targeted and augmented SBIRS, he added that DoD and DARPA have modified and offered funding along these lines.
Taming the wild west of semiconductor backend manufacturing!
SEMI, USA recently organized a conference around standardizing the semiconductor
manufacturing backend.
The speakers were: Alan Weber, VP, New Product Innovations, Cimetrix, Brian Rubow, Director of Solutions Engineering, Cimetrix, and Albert Fuchigami, Senior Software Developer, PEER Group.
Alan Weber, Cimetrix said there are backend automation challenges, in contrast to wafer fabrication. These are multiple material transformations, flow shop manufacturing operations, high product variety and velocity, significant manual intervention, complex unit product traceability, wide range of equipment cost, and low automation budget, suppliers unfamiliarity with SEMI standards, and handling multiple data source types/protocols.
Backend material/carrier forms and related processes include the incoming wafer, mounted wafer, strip (lead frame), and individual packages.
What is GEM standard?
The GEM standard benefits all manufacturing equipment in many industries. Brian Rubow, Cimetrix, stated GEM interface is software running on manufacturing equipment that complies with GEM standard. This includes SEMI E30, specification for communication and control of manufacturing equipment, generic equipment model (GEM), and binary messages over TCP/IP.
A GEM interface allows external entities to connect to control, monitor, and collect data from the equipment. The external entity is a ‘host’. It can be factory, equipment supplier, other equipment supplier software. GEM is a popular standard in multiple industries. It is applied on 100 percent of semiconductor frontend (wafer fabrication), semiconductor backend (packaging, assembly, test), PV, HB-LED, PCB fabrication, PCB assembly/SMT, flat panel display, etc.
By using GEM, equipment suppliers save time and money, investing in one remote interface technology for all customers. GEM interface can be used to meet all end user requirements, who get to save on time and money.
Challenges
There are certain challenges integrating GEM technology. On the equipment side, some factories don’t follow standards, requiring features that violate the standard. On the factory side, some equipment don’t follow standards, forcing a factory to adapt to noncompliance. Equipment software is also not well tested.
The biggest challenges integrating GEM technology have nothing to do with the standard itself. You need to learn the technology, follow standards, and implement professional software practices.
Fundamental requirements of GEM include communication state machine, control state machine, processing state machine, collection event notification, identification, error messages, and documentation.
Additional capabilities include dynamic collection event reports, variable, trace, status data,
self-description, alarms, remote control, equipment constants, recipe management, material movement, terminal services, clock, and spooling.
GEM standard is feature complete for factory automation and smart manufacturing. Contrary to myth, GEM can support multiple connections, and horizontal communication. New features in the April 2023 version include unique equipment identification, simplified large recipes, access to GEM documentation through interface, improved access to GEM interface setup, standardized logging (XML schema), and standardized implementation documentation (XML schema), respectively.
What is EDA / Interface A?
Next, Albert Fuchigami, Senior Software Developer, Peer Group, talked about EDA / Interface A.
Equipment data acquisition (EDA) / Interface A are a collection of SEMI standards that enable high-speed data publication from any equipment to any data consumer through web services. There are direct, dedicated channels to each consumer, separate from control messages.
Each consumer has their own set of data collection plans (DCP) tailored for needs. Only authenticated and authorized users can collect data through EDA. DCPs also support a sophisticated set of data collection triggers and techniques. It is focused on real-time data collection, and cannot control the equipment or access historical data. EDA / Interface A is self-contained framework that defines access control, DCP management and metadata organization.
Discussing the use of EDA in the factory, there is increased global interest from industry and fabs. Slow adoption is now gaining momentum. It is referenced in fab purchase specs (as well as SEMI E164). It is also a frequent topic at smart manufacturing / APC conferences.
Common scenario is to use EDA to get data for APC/FD/digital twin, and then use those analysis results to tweak settings through the control channel (e.g., SECS/GEM). Industry is now demanding more data, and faster, leading to the need for Freeze 3.
Freeze 3 is the next-generation EDA. Freeze 3 will integrate HTTP/2 with gRPC and protocol buffers technology to deliver higher performance and more efficient data transfers, better network security to protect data exchanged, ease of adoption with multiple platforms, and programming language support.
Freeze 3 will streamline functionality to better reflect actual customer use cases. It clarifies the client/consumer deployment scenarios. You get better security and authentication support. There is added cached data support to trace collection Freeze 3 has been in development by the DDA TF since 2017. First set of updates have been published. Further updates and interoperability testing are underway.
US EPA update on recent PFAS research and regulatory actions
Senior leaders and experts from EPA provided SEMI members with an overview of EPA’s efforts under the PFAS Strategic Roadmap, finalized reporting rules under Toxic Substances Control Act (TSCA) and Toxics Release Inventory (TRI) program, review and management of new PFAS chemicals under the TSCA New Chemicals program, and an update on R&D, including analytical test methods development.
Joe Stockunas, President, SEMI Americas, welcomed the audience.
Matt Klasen, PFAS Council Manager, US Environmental Protection Agency (EPA), presented on the EPA’s PFAS strategic roadmap and federal coordination.
EPA Administrator, Michael Regan, established EPA Council on PFAS in April 2021. The Council developed the PFAS Strategic Roadmap, released in October 2021 – a strategic, whole-of-EPA approach to protect public health and the environment from PFAS The roadmap includes timelines for concrete actions from 2021-2024, fills a critical gap in federal leadership, supports states’ ongoing efforts, and builds on the Biden-Harris Administration’s commitment to restore scientific integrity.
EPA’s goals are to restrict, remediate, and research. To restrict, it will pursue a comprehensive approach to proactively prevent PFAS from entering air, land, and water at levels that can adversely impact human health and the environment. To remediate, it will broaden and accelerate cleanup of PFAS contamination to protect human health and ecological systems. It will Invest in research, development, and innovation to increase the understanding of methods for measuring PFAS in the environment, assessing human health and environmental risks, and evaluating and developing technologies for reducing PFAS.
Key PFAS roadmap accomplishments were made in 2023. One, making PFAS use safer through robust chemical reviews and improving data. Two, holding polluters accountable through enforcement and compliance, and hazardous-substance designations. Three, protecting America’s drinking water through national drinking water standards and nationwide monitoring. Four, deploying Bipartisan Infrastructure Law funding to address PFAS in water. Five, turning off the tap for industrial polluters using the Clean Water Act authorities. Six, advancing the science of PFAS toxicity, exposures, and methods. Seven, incorporating equity and environmental justice through analyses, funding, data, and tools. Eight, listening to and learning from communities.
Recent R&D activities
Dr. Susan Burden, PFAS Executive Lead, Office of Research and Development, EPA, spoke about recent PFAS R&D activities. She provided an updated status of EPA methods. Methods 533 and 537.1, and SW-846 Methods 3512 and 8327 were all on drinking water. They were in final status as of 2019-2021.
Draft Method 1633, in partnership with DoD, involves soil, surface water, groundwater, wastewater, biosolids, sediment, landfill leachate, fish tissue, etc. Multi-lab validation study was completed for aqueous matrices (fourth draft). Final method is anticipated soon. Draft Method 1621 is for absorbable organic fluorine found in surface water and wastewater. Multi-lab validation study is anticipated soon.
OTM-45 for polar, semivolatile PFAS is found in air emissions. It is in Version 0 (2021), with updates anticipated soon. OTM-50 for nonpolar, volatile PFAS is in air emissions, and is also anticipated soon.
Research is underway at different lab methods. For aqueous, there are FTOHs and related PFAS precursors in surface water, groundwater, wastewater, landfill leachate, etc. Total oxidizable precursors assay for inclusion in SW-846. Extractable organic fluorine is for drinking water. For solids, we have Leaching Environmental Assessment Framework (LEAF) for PFAS. For air, there is nonpolar, semivolatile PFAS in air emissions, and FTOHs in indoor air.
We have non-targeted analysis methods such as advancing tools and resources for non-targeted analysis. Best practices for non-targeted analysis (BP4NTA). Practical application guide for discovery of novel PFAS in environmental samples using high resolution mass spectrometry (2023). And, increasing technology transfer to states and EPA regional labs.
Reporting rules
Stephanie Griffin, Team Lead, Data Gathering & Analysis Division, Office of Pollution Prevention and Toxics, US EPA spoke about reporting rules under TSCA and TRI.
TSCA 8(a)(7) PFAS reporting rule states that any person who’s manufactured a PFAS for commercial purposes in any year since 2011 must report finalized on October 11 (40 CFR 705). SEMI submitted public comments on the proposed rule, so to highlight some of the changes from the proposal.
Definition of “PFAS” includes three sub-structures: reporting timeframe — most submitters have until May 8, 2025 to report. Small article importers have until November 10, 2025 to report. There are two streamlined reporting forms. It includes article importers and manufacturers of R&D substances (<10 kg/year).
In addition to CBI claim requirements from 2016 Lautenberg Act and 2023 TSCA CBI procedural rule, the 8(a)(7) rule stipulated the following generic names/descriptions for PFAS chemical identities need to contain “fluor”. Article importers are not required to assert or substantiate CBI claims for chemical identity. EPA will not make CBI claim determination for chemical identity based on article importer reports.
Joint submission requirements are that manufacturers, (other than article importers), who do not know the specific PFAS identity (i.e., CAS name, CASRN, Accession number or LVE number) must initiate a joint submission with their supplier or other entity who is able to identify the specific PFAS and assert and substantiate a CBI claim as appropriate
If any entity (other than article importer) reporting the specific PFAS identity fails to assert and substantiate a chemical identity as CBI, EPA intends to start the process of moving that chemical identity to the public portion of the TSCA Inventory, following public notification via EPA’s website of the Accession numbers of PFAS that EPA intends to move to the public inventory.
PFAS as TRI chemicals of special concern rule was finalized on October 31, 2023 (updated 40 CFR 372). Changes are effective with Reporting Year 2024, for data due by July 1, 2025. There are two major updates. All PFAS added to TRI due to FY 2020 NDAA are on the list of chemicals of special concern (40 CFR 372.28). Facilities can’t use the de minimis exemption for TRI reporting threshold & release calculations. Facilities cannot use the Form A Certification Statement for PFAS reporting. Form R range reporting options are limited.
For all chemicals of special concern (i.e., PFAS and PBTs), the de minimis exemption for supplier notification purposes is no longer available.
TRI Supplier Notification Reminders were made. Supplier notifications must include the statement that a mixture/product contains a TRI chemical, with name & CASRN (or TRI chemical category ID) for each, and Wt percent of each TRI chemical in mixture/product.
Notifications must be provided at least annually, in writing. If an SDS is required, supplier notification should be included in or attached to the SDS. New or revised notifications required if a mixture/product’s composition changes w/r/t the TRI chemical(s), or if previous notification incorrectly identified the chemical(s) or weight.
Facilities/suppliers may be required to provide supplier notifications even if they aren’t required to report to TRI. Updates to the supplier notification requirement (i.e., no de minimis for chemicals of special concern) are in effect for 2024 shipments.
Management of new PFAS
Shari Barash, Acting Director, New Chemicals Division, Office of Pollution Prevention and Toxics, US EPA, spoke about review and management of new PFAS under TSCA. In the new chemicals PFAS framework, we look at whether PFAS is a PBT. We perform risk assessment as typical. Following that, we have risk management.
In scenario A –“negligible”, makes PBT PFAS fully captured/negligible environmental release –e.g., all processes are fully enclosed. Worker exposure is fully mitigated – e.g., worker inhalation exposure is not expected (or is only negligible/non-quantifiable)under normal operations. All waste is captured and disposed of in accordance with OLEM guidance. There is no consumer exposures.
Scenario B –“low” looks at all cases that don’t fit into scenarios A or C. No consumer exposures. Scenario C –“expected”, where, release is essential to the use (e.g., traditional fire-fighting foams) or unavoidable due to the nature of the use. Consumer exposure may be expected based on intended use.
There are updates to new chemicals regulations. On May 26, 2023, EPA proposed the amendments to the new chemicals procedural regulations under TSCA. In the rule, EPA proposed to make PFAS categorically ineligible for low volume exemptions (LVEs) and low release and exposure exemptions (LoREXs). For the purposes of the rule, EPA proposed to define “PFAS” using a structural definition. The same definition was proposed for the Inactive PFAS SNUR and finalized in the 8(a)(7) rule.
EPA did not propose any revocations as part of the proposed rule. EPA solicited comment on revoking previously granted LVEs for PFAS pursuant to the existing process set forth in 40 CFR 723.50(h)(2). If finalized as proposed, the amendments to exemption regulations would require all new PFAS to be reviewed through the PMN process. EPA is reviewing public comments received on the rule. EPA expects to finalize this rule-making in the spring of this year.
Optical design and simulations, and dealing with systems complexity
European Photonics Industry Consortium (EPIC) recently hosted a seminar on optical designs and simulations.
Oliver Faehnle, Head, Optics Fabrication, OST University of Applied Sciences, Switzerland, and co-owner, Pandao, presented on modelling of optical fabrication chains during optical design.
Modelling optical fabrication chains
Modelling of optical fabrication chains depends on performance, optical system design, fabrication chain design, and production. It also needs human interaction. Today, there are over 360 optical fabrication technologies.
Today, you need to design for best performance, do fab chain design after optical design has been finished, and check whether fab feedback comes too late. The next stop is to balance performance and generation. We need to be modelling best fab chain. We also need instant risk and cost impact analyses during optical design.
Pandao provides optical purchasing that cuts down vendors quotes by 30 percent, minimize risk of vendors failure, and enables vendors audits. For optical production, it cuts down 20 percent on fab chains cost, does fab chain marketability analysis, enables capacity steering with one click. For optics design, it cuts down development time by factor of 2, cuts down number of meetings, and does cost impact analysis of design parameters. It also provides the necessary training for optics fab engineers.
Dealing with optical systems complexity
Emilie Viasnoff, Business Development Director, Optical Solutions Group, Synopsys, presented on how to deal with optical systems complexity?
Optics and photonics are getting from the device level to the system level. Synopsys’ driver has been consumer optical systems. Other drivers include automotive optical systems, AR/VR/MR optical systems, and aerospace and defense optical systems. We are dealing with system complexity and optimization.
AR/VR/MR is an emerging application with cutting-edge challenges and system-level constraints. AR/VR systems are collection of complex components: displays using microLEDs, holographic optical element and diffraction optical element HOE/DOE, sensors for head tracking, eye tracking, gesture tracking. There is still a long way to go despite extraordinary investments, and many important industry players.
According to IDTechEx, ‘software is nearly there, but hardware has many hurdles to overcome.’ In optics, there is bottleneck with combiner and compact camera optics. In display, there are issues with resolution and full color. In sensors, there are the emerging technologies in eye tracking and time-of-flight cameras.
For great AR/VR/MR systems, you need a great chip that is AI-enabled, fully-optimized optics, great microdisplay that can provide great images, and great cameras, leveraging metalenses. You need a simulation platform to design and test this complex system.
Synopsys Optical Platform consists of CODE V, LightTools, RSOFT, and LucidShape family. Application areas covered include imaging systems, displays including AR/VR, ADAS, and aerospace and defense. Synopsys design and simulation workflow for waveguide AR glasses includes a parametric bidirectional scattering distribution function (BSDF) as link between RSoft and LightTools.
You can also co-simulate the image quality, setting the interoperability stage for ultra-small and smart cameras. CODE V IMS analysis can understand image quality. LightTools stray light simulation can check ghost image from lens and flare caused by mechanism and sensor.
Synopsys offers design through manufacturing simulation. The simulation flow quantifies manufacturing impact on device performance. Here, metalenses are subject to patterning effects such as shape, shifted size, sidewall angle, and pillar size.
Optics have evolved to more complex systems, especially in consumer applications, such as cameras, AR/VR/MR, ADAS and A&D. Designing these optical systems needs a paradigm shift toward comprehensive simulations platforms.
Synopsys has a comprehensive portfolio to design, optimize and test, end-to-end, optical systems. Our optical design platform for multi-scale simulations is tied to Synopsys electronics platform. Beyond optics, you can go at the system-level with more simulations.
Meta optics design
Lieven Penninck, founder, PlanOpSim, talked about meta optics design software and services. The future is about nano-enabled components. Higher performance gets even more simplified, and there are miniaturized new applications. Design is costly, complex, and time consuming.
PlanOpSim supplies R&D tools to engineers and scientists that allow to unlock the maximum benefit of flat optics in a user friendly way. It offers dedicated meta-surface UI and design workflow, and high-speed and large area simulation. It also offers multi-scale simulations from nano to macroscale.
Meta-surface design workflow takes care of system model, library building, component design, ODA and system analysis, etc. An example of metalens design was design of a metalens with diffraction limited focusing and NA 0.55 for 632nm.
For meta atom optimization, there is a full maxwell solution using rigorous coupled wave analysis. Meta lens performance analysis looks at physical optics regime, flexible and fast parameter variations, direct output to manufacturing, and seamless integration to full wave calculation. Overlapping domain analysis accounts for the interaction of meta atom with neighboring structures. Local calculation avoids memory restriction of full wave calculation. ODA1 (order 2) beta release was in Nov. 2023.
Overlapping domain analysis improves meta-surface calculation accuracy, and is 18x faster than full wave calculation. PlanOpSim will be starting multi-project wafer service very soon, such as meta surface PDK. You can submit meta surface designs for manufacturing from PlanOpSim. Supported wavelength 940nm and size up to 5×5 mm.
SEMI University now addressing workforce challenges!
Global semiconductor industry is expected to double in annual revenue to $1 trillion by 2030. To support this growth, the industry will require an additional one million new workers worldwide. To reskill and upskill these learners requires quality technical training and education.
SEMI University is an online educational platform for and about the semiconductor and electronics industry. Designed by industry experts, the platform responds to professional learning and development needs of SEMI members and new industry entrants globally. With a comprehensive and curriculum focused on electronics and semiconductors, SEMI University is a new and vital resource.
Introducing SEMI U
Naresh Naik, Director, SEMI University, said that we are addressing our workforce challenges. In a rapidly evolving semiconductor industry estimated to reach $1 trillion by 2030, there will be an estimated shortage of more than 900,000 workers. Companies are limited on time to allow for off-site training, and resources in terms of training funds and internal curriculum options.
Employees, specifically engineers, require more accommodating solutions. They need complementary tools and training to fully understand complex semiconductor and electronics industry topics. They also need flexible training options that provide 24/7/365 learning and professional growth opportunities. The electronics manufacturing and design industry needs a 21st century training solution.
Comprehensive curriculum
SEMI University (SEMI U) was launched globally on February 7th, 2023. SEMI U is an online educational enrichment platform for and about the semiconductor and electronics industries. Designed by industry experts, the platform responds to the learning and development needs of SEMI members and new industry entrants worldwide. With a comprehensive curriculum that is focused on electronics and semiconductors, SEMI U is a new and vital resource for organizations seeking education and training for their employees.
There are 525+ on-demand courses specifically for the semiconductor industry. We provide one year access to course(s) from time of purchase. Multiple languages are supported. We offer individual and bundled pricing, and SEMI member discounts.
Students can get education and training to learn about complex semiconductor and electronics topics. Semiconductor expertise is available for all skill levels. You can keep pace with technology trends, and also have a flexible learning schedule.
SEMI University offers over 525 courses across several categories. Some of them are: introduction to semiconductors, advanced technologies, AI and data techniques, safety – human, safety – facility and workplace, principles of design, front-end processing, back-end processing, test and characterization, yield and failure analysis, optoelectronics, MEMS, etc.
The current status of SEMI U is: 3,000+ user enrollments, users from 54 countries enrolled, 75 courses in Japanese, 90 courses in Chinese, 23 courses in Korean, etc.
Semitracks curriculum includes: advanced CMOS/FinFET fabrication, curve tracer, design for reliability testing, design of experiments, EOS ESD and how to differentiate, ESD design and technology, failure and yield analysis, fundamentals of yield, leading-edge design tradeoffs, leading-edge process tradeoffs, LED and VCSEL testing, LED/SSL technology, packaging, and apps, MEMS, metallography, military standard training, optoelectronics and silicon photonics, PCB design, process integration, quality introduction, quality statistics, reliability, semiconductor reliability and product qualification, semiconductor technology overview, semiconductor technology, design and testing, solder joint analysis, wafer dicing, etc.
UL safety bundles include: flexible and printed electronics, preventing sexual and workplace harassment, preventing slips and falls, basic first aid, semiconductor chemical safety, semiconductor electrical safety, semiconductor ergonomics and hazard, process safety management, welding safety, semiconductor EHS, etc.
Roadmaps 2023-24
In roadmap 2023, SEMI U provides the introduction to silicon chip and semiconductors. It includes basic electronics, semiconductor manufacture, economics of IC manufacture, IC market overview, IT revolution, etc. This curriculum provides comprehensive insight into the electronics and IC industry including terminology, history, theory, technology, production process, economics and market applications. It is coming soon!
SEMI U also offers semiconductor technician certifications. It has 56 courses with three certifications. These are in beginner, intermediate, and advanced level certification
Roadmap 2024 includes occupational safety and health administration or OSHA 10- and 30-hour online certifications. You can earn OSHA 10 or OSHA 30 card on your own schedule, and at your own pace. It is available for US-based employees under OSHA’s jurisdiction. You get 24/7 access to OSHA course material. OSHA completion card is provided by the US Department of Labor.
Roadmap 2024 also includes IC packaging curriculum, with three certifications. You start with an introduction to IC packaging, board assembly and soldering, PCB and substrate, etc. In Q2, you move up to interconnects FEOL/BEOL, etc. Q3 includes material characteristics, failure analysis and mechanism, etc.
In 2024, we will have focus areas. These are: make courses available in multiple languages — Chinese, Japanese, Korean. Speaker videos from events and SEMICONS. Offer live classroom and virtual trainings. Convert live classroom training into online eLearning – accessible for global regions. Create advisory council (for future content, identify training gaps). And, partner with additional external course providers.
Pricing guide
SEMI University 2023 pricing guide – per user for one-year access was given. Individual courses start from $29.95-$49 for SEMI member, and $35.95-$155 for non-member. For Semitracks subscription (26 courses), it is $650 for SEMI member, and $770 for non-member. Course bundles (3 to 11) are from $85-$297 for SEMI member, and $102-$660 for non-member.
For students across the world, and in India, here is your chance to learn about the global semiconductor industry, at your own pace! The pricing looks reasonable for a year! You can easily contact SEMI U either through semiu-support@semi.org or nnaik@semi.org! All the best!!
Dynamic control of ALD films for fast and efficient MEMS manufacturing
SEMI, USA and Forge Nano demonstrated atomic layer deposition (ALD) strengths and perceived weaknesses. Forge Nano has overcome the weaknesses with their single wafer production equipment.
Forge Nano is a Denver, Colorado-based end-to-end ALD solutions provider. It does equipment sales, product/process development, toll coating and licensing, precursor management, maintenance services, and spares. Forge Nano coatings has benefits such as strong chemical bond to surface, modify surfaces to enhance performance, uniform and pin-hole free coatings, and precision coatings that reduce costs.
ALD is used as gate dielectric in logic, word line fill in 3D NAND, passivation in MEMS/OLED, and surface passivation in PERC solar. ALD provides enabling technology for current and next-gen MEMS. ALD is still underutilized in current MEMS manufacturing.
Matt Weimer, Principal R&D Scientist, Forge Nano, said ALD is all about sequential surface reactions to deposition thin films atomic layer by atomic layer. You need to be able to visualize atomic scale chemistry. Based on spontaneous, sequential, self-limiting thermal reactions add material with atomic level control. Self-limiting surface chemistry deposits conformal, uniform, pin-hole free films, with good surface adhesion. However, with traditional ALD systems, one must choose between efficient precursor use or efficient purge times.
We can cheat the ALD tradeoff. Batch system can have high throughput with volume, but, not speed. Batch ALD tools can degrade MEMS performance. Batch ALD can take days longer, increasing the time at temperature leading to degradation of films and properties. There can be up to 60 percent decrease in PZT piezoelectric coefficient after extended time at elevated temperatures. Single wafer has a more traditional thermal budget, making it ideal for MEMS. Single wafer ALD tools are preferred, and often required, for MEMS applications
Forge Nano’s ALDx enables dynamic precursor pressure control. It uses synchronously modulated flow and draw (SyMoFD). SMFD lives in both pressure regimes and breaks the tradeoff. ALD is no longer slow. We can get true ALD at > 12nm/min with efficient precursor utilization. Proprietary technology at Forge Nano is used for fastest and most efficient single-wafer ALD.
Tailored multilayers are accessible using ALD. It provides discrete and digital film growth with each cycle, enabling layer stacks of multiple discrete materials. Films with different properties can be layered to ‘tune’ the bulk multilayer film properties and access. ALD allows improved gas diffusion properties, tunable dielectric behavior, and modified film stress.
Multilayer films via ALD enable superior moisture diffusion barrier performance in FET devices. ALD-CAP is our ALDx multilayer of Al2O3 and SiO2. Moisture barrier performance is paramount in piezo-based MEMS devices. ALDx SiO2 outperforms plasma-enhanced ALD SiO2. Multilayer films via ALD enable tunable dielectric barrier and leakage current behavior. Forge Nano ALDx is faster than batch tools.
Talking about ALD apps for MEMS devices, nanolaminates can modulate stress for ALD films. While stress can change in harsh environments, stress tuning is critical for actuator, microengines, Si oscillators, RF switches, cantilevers, optoelectronic and optical MEMS, etc. Thin, multilayer ALD films have superior moisture barrier performance suitable for MEMS technology. Forge Nano is looking to partner with a suitable group to study the combination of stress tuning with environmental exposure.
ALD offers multiple paths to improve mechanical reliability and lifetime of MEMS. Forge Nano’s ALDx can improve MEMS through properties modification, quickly, and efficiently. CRISP process allows for the development of difficult chemistries and new materials. SyMoFD enables expensive films and precursors. Nanolaminates have been demonstrated for oxides, sulfides, and nitrides.
CHIPS for America NOFO for supply chain facilities below $300 million
CHIPS for America announced its second notice of funding opportunity (NOFO) to strengthen the USA semiconductor supply chain, advance technology leadership, and support vibrant domestic semiconductor clusters. It is now open to smaller supply chain projects and businesses seeking to construct, expand, and modernize materials or manufacturing equipment facilities with capital investment below $300 million.
US Department of Commerce announced the funding opportunity for smaller supply chain projects and businesses to access CHIPS for America funds. As part of President Biden’s Investing in America agenda, the bipartisan CHIPS and Science Act includes incentives to strengthen supply chains, support smaller projects and businesses, and create good-paying jobs in local communities across the country.
Projects will produce equipment, chemicals, gases, and other materials, critical to manufacturing semiconductors in America. Suppliers are strongly encouraged to apply for CHIPS incentives alongside other institutions from their regions to expand their economic opportunity and competitiveness.
The investments made as part of this new funding opportunity will support three strategic objectives as outlined in our “Vision for Success”:
- Strengthen supply chain resilience,
- Advance US technology leadership; and
- Support vibrant US fab clusters with a reliable ecosystem of suppliers.
Ms. Gina Raimondo, Secretary of Commerce, said, “CHIPS for America is laser-focused on ensuring both our economic and national security by making smart investments up and down semiconductor supply chains that enable smaller suppliers and more American workers to help grow the US semiconductor industry.”
In a seminar, Ms. Jesse Stoneman, Deputy Director, Public Engagement, CHIPS Program Office, said we are sharing our strategic vision for the smaller-scale supply chain projects funding opportunity. The announcement is on $39 billion for the manufacturing program of CHIPS for America Act. It is for the semiconductor materials and equipment facility projects under $300 million.
We had two funding opportunities earlier: first, for commercial leading-edge, current, and mature node fabrication facilities, and second, for large semiconductor materials and equipment facility projects over $300 million. We will have a final opportunity to support the construction of semiconductor R&D facilities. So far, CHIPS Program Office has received over 500 statements of interest, and 100+ pre-applications and full applications.
Ms. Nikita Lalwani, Senior Advisor to Director, CHIPS Program Office, said this funding opportunity has been tailored for smaller businesses. It has priorities such as economic and national security objectives, commercial viability, financial strength, technical feasibility and readiness, and workforce and community investment.
We need to strengthen supply chain resilience, and advance US technology leadership. USA will have incentivized major US equipment and materials suppliers to increase their footprints in the USA. Non-US suppliers of world’s most advanced equipment, materials, and sub-systems will also establish large-scale footprints in the USA.
By the end of this decade, we should be able to support vibrant US fab clusters. Each CHIPS-funded fab cluster in the USA will be supported by dozens of suppliers, including many investing in USA for the first time. State and local entities are encouraged to help facilitate the expansion of these ecosystems.
Ms. Olivia Briffault, Investment Principal, CHIPS Program Office, detailed funding instruments. For total funding, up to $500 million in direct funding is available in total. For funding by projects, direct funding is expected to be 10 percent of project capital expenditures. A ‘lender marketplace’ will connect the loan-seekers with private sector institutions. CPO is also exploring other opportunities to provide credit.
Applications will be accepted between Dec. 1, 2023, and Feb. 1, 2024. For applications that are invited to the full application phase, the program will communicate submission dates individually upon notifying them of their advancement. Concept plans will no longer be accepted on a rolling basis. Unlike previous funding opportunities, no statement of interest is required under this NOFO.
The concept plan submitted should describe how the proposed project addresses the core program priorities. It will be used by the Department to score applicants and invite those most likely to receive an award to advance to the full application phase. The Department will invite the most promising applicants to the second phase, where they will have the opportunity to submit a full application.
Concept plan evaluation criteria includes: Extent to which a project advances USA economic and national security. Project’s long-term commercial viability, including robust customer demand for the proposed project output. CHIPS incentives justification. Likelihood that applicant will successfully execute the project, including construction and environmental review. Availability of non-CHIPS funding sources.
Ms Lalwani added that in the full application, you will be asked to submit a Workforce and Community Investment Plan containing construction and facility workforce strategy, and community investment strategy. Consortium members may collaborate on this plan.
We are also defining consortia and clusters. For consortium, there should be entities working to build vibrant US semiconductor fab clusters. For cluster, look at geographically compact area with multiple commercial scale fabs owned and operated by one or more companies, R&D facilities, specialized infrastructure, such as chemical processing and water treatment facilities, nearby suppliers to the semiconductor industry, diverse, and skilled workforce, etc.
A strong consortium should have at least two suppliers, a state or local government entity, an anchor institution. It may also contain workforce training providers, labor unions, economic development corps, etc. Members may develop one strategy at the consortium level covering each consortium member. Consortia is strongly encouraged for applicants claiming to benefit US clusters. Consortia is welcome for applicants claiming to support the other two objectives.
Consortium participants example includes supplier facility, state or local government, higher education institute, semiconductor fab, economic development corporation, workforce provider, labor union, etc.
This new funding opportunity features an application process designed to be accessible for smaller businesses and projects. The application process includes two phases:
Concept plan: Applicants will be asked to submit a concept plan describing how their proposed project addresses core strategic objectives, including US economic and national security. Concept plans will be accepted between December 1, 2023, and February 1, 2024.
Full application: The Department of Commerce will review submitted concept plans and invite the most promising applicants that demonstrate how they advance program priorities to submit a full application for CHIPS incentives. The full application submission dates will be communicated to applicants individually upon notifying them of their advancement.
FAQs
Some FAQs were raised. One: there is no fab in my area. Can I still make the case that I am advancing a US fab cluster? Yes. The Department is interested in projects that advance clusters by closing critical gaps in the US supplier landscape. Often, projects will accomplish this goal by locating near the fabs to reduce burdens associated with transporting critical supply chain inputs. But, that is not a requirement. The Department welcomes projects that support clusters in other ways, including by providing critical materials or equipment to fabs in multiple areas.
Next, how do I apply as part of a consortium? Each member of a consortium seeking funding for a project eligible for CHIPS Incentives must submit their own separate concept plan and application. As part of the concept plan and application, consortium applicants will be asked to submit a ‘consortium narrative’ detailing other consortium members, and setting forth the overall strategic vision of the consortium, among other relevant information.
Applicants that are part of the same consortium should submit the same information in their consortium narrative.Funding will be awarded on a per-project basis to consortium members proposing to construct, expand, or modernize a facility eligible under the second NOFO. For more information, see Sections I.B.4 (“May applicants apply for funding under this NOFO as part of a consortium, and if so, how?”) and IV.G.2 and IV.H.2 (“Consortium Narrative”) of NOFO 2.
Will the consortium receive funding as a whole? Funding will be awarded on a per-project basis to consortium members proposing to construct, expand, or modernize a facility eligible under NOFO 2. Eligible uses of funds include costs to:
- finance the construction, expansion, or modernization of a facility, or equipment for that facility,
- support site development and modernization for a facility,
- support workforce development for a facility, and
- pay reasonable operating expenses for a facility, as determined by the Department.
What should state and local governments do if they want to form or support a consortium application? State or local government entities that join consortia are strongly encouraged to take steps to build and support vibrant semiconductor clusters. Such steps might include investments in workforce, education, site preparation, research and development, or infrastructure (including transportation, housing, water, or energy) designed to benefit both the consortia members and the broader community.
State and local government entities in consortia are also strongly encouraged to help streamline access to resources critical to cluster growth, such as permitting and expansion services, and coordination with relevant regulatory authorities. For consortia that include a state and/or local government entity, the “consortium narrative” should list any actions that entity is taking or intends to take to facilitate cluster development.
The Department expects that strong consortia will include an anchor institution such as a semiconductor fab. What are other examples of anchor institutions? Besides, semiconductor fabs, the anchor institutions could include large suppliers, universities, and/or advanced packaging facilities. Along with the anchor institutions, strong consortia will also include at least two suppliers, and state or local government entity, and may include entities such as workforce training providers, economic development corporations, labor unions, institutions of higher education, philanthropic foundations, industry organizations, Tech Hubs, or other relevant entities.
Are there downsides to requesting an award of more than 10 percent of project capital expenditures? If an applicant requests more than 10 percent in CHIPS Direct Funding, the Department expects that it may take substantially longer to evaluate the full application and prepare an award. In addition, the applicant will need to make a particularly compelling case that their project advances the Department’s economic and national security objectives. Additional funding is necessary to make the project commercially viable.
Global semiconductor industry’s ultra-strong Q2-23 an unexpected big surprise: Future Horizons
Global semiconductor industry has registered an ultra-strong Q2, according to Malcolm Penn, Chairman and CEO, Future Horizons.
First, the really good news! The semiconductor industry downturn bottomed in Q2-23. The golden cross was breached in July 2023. It’s sunny weather ahead! Second, the even better news! The downturn bottomed one quarter earlier than the ‘4-quarter normal’.
The ultra-strong Q2 was an unexpected big surprise. Even TSMC was warning of -4 to -9 percent quarterly decline. Logic and micro (AI) led the way. Timing has impacted the math, but not the analysis. Will the ‘recovery’ last, or wither on the vine?
Looking at semiconductor annualized growth rate trends, the annualized monthly IC growth rate jumped from ~ -24 percent (Jan-May) to ~-7 percent (Jun-Jul). The impact of June 2022 market crash is now measured against 30 percent lower baseline. The annualized IC growth rate is much flatter, moving forward over the next four quarters. We need to differentiate between the impact of the maths vs. the market.
Looking at the impact of memory, it is two sides of the same coin. Only the amplitude of the swings is different. Actually, it is four sides of the same coin! Recovery has happened across memory first, then micro, followed by logic, and finally, analog.
Worldwide IC annual growth rate unit and value trend reveals that ‘recovery’ in market value is driven by ASP ‘rebound’ based off June 2022 collapse. Beware of danger of ‘spreadsheet’ vs. ‘real market’ recovery? We also need to look at the trends and numbers.
The global economy is still plagued in fuzzy uncertainty. China, post Covid-19 has had growth disrupted by global economic slowdown, tepid domestic demand, ailing real-estate sector, CPI deflation, and record-high youth unemployment. The unpredictable regulations and sudden crackdowns are inhibiting entrepreneurial spirits. 2023 GDP growth downgraded to 4.8-5 percent, and 5 percent for 2024. China is no longer an unstoppable powerhouse set to displace USA.
India is standing by, poised to fill vacuum created by China, with 2023 GDP being 6.5 percent. It is now fifth-largest economy, contributing 15 percent to world GDP. Inflation continues to dominate Central Bank agenda keeping interest rates high. There have been some signs of cooling in the still tight US labor market resilience. High interest rates are starting to dampen consumer discretionary spending. House price inflation is driven by too few houses up for sale (interest rate trap). Despite headwinds and contradictions, S&P 500 continues to hit new highs, up 16 percent YTD.
Importantly, China’s four-decade economic miracle is now starting to fade. Inflation has fallen dramatically from its 2022 peak. It is still stubbornly higher than its 2 percent goal. Ongoing pressure on interest rates will continue, until inflation dragon is slain.
Excess inventory is still burning! July shipments run-rate was 6.8 billion units/week vs. 8.2 billion peak (down 18 percent). Current run-rate is down 7 percent from actual demand (deficit is inventory burn). Inventory depletion is still unlikely over before Q4-2023 (and, longer if end demand softens). We are in the eighth consecutive month of below trend line unit shipments. Do we have ‘12 more’ to go? LTA’s prolonging inevitable downturn excess inventory adjustment.
The past four corrections took 8-10 quarters. 1996, 2001, and 2011 capex bottom was at 7.5 percent for global semiconductor sales. 2007, though shorter, was worse at 3.7 percent. The outlook for 2023? Based on past history, bottom out Q2-2025 at 7.5 percent semiconductor sales. That’s potential double whammy of slowing Western market and restricted China sales.
ASPs had plummeted, with recovery in progress. Steady ASP recovery was from Dec. 2020-May 2022. This was driven by strong unit demand, maxed out capacity, and product shortages). It plummeted in June 2022, wiping out 85 percent of previous 18 month’s gain in one month. Once supply exceeds demand, ASPs plummet to cost ‘keep the books full, as any order’s a good order.’ We have seen sharp YoY rebound in June 2023, with more math vs. recovery. Logic proved remarkably resilient, predominantly custom SoCs? The long-term trend is zero! The ups and downturns had been straight out of the book.
Revised forecast
IFS 2023 forecast is still -22 percent. The Q1 actual results were -8.2 percent, close to the Jan. 2023 bull forecast scenario. The -26 percent worse case bear scenario is now, and not likely to happen. It has also skewed our overall forecast closer to the -17 percent best-case scenario.
Stronger Q1 pulled the forecast outlook slightly better. Shift though was modest and well within the forecast margin of error. Nothing of substance had changed from Jan. 2023 (May 2022) analysis. We have a formal change to our -22 percent number for 2023, but -20 percent is more likely. Strong negative growth year message means critical priority, given that there is still prevailing industry denial.
Q2 actual results should be +6 percent for the global semiconductor industry. Massive swing statistically, from -5 percent to +6 percent. There is relatively modest $13 billion revenue impact, from $233 billion to $246 billion. Timing is critical, and small change early on has big impact on the number!
The overall status is nothing to write home about (either way). Chip industry needs a strong GDP to flourish. Units will eventually sort themselves out. Excess capacity will keep overall sales value depressed. ASPs will slowly trend back up the recovery path
2024 outlook
Looking at the outlook for 2024, we should be statistically back to high single-digit growth. The magnitude and timing depends on inventory burn and the economy.
Downturn bottomed in Q1-2023, which was one quarter earlier than the ‘4Q normal’. With uncertain recovery outlook, inventory, capex, and economy are causes for concern. The 2023 growth is now -10 percent vs. -22 percent Jan. 2023 (Mar. 2022) forecast. There is impact of the math, not the analysis. Beware the ‘spreadsheet recovery’ false flag! Be also wary of the capex sword of Damocles. Capex spend is at a historic record high. If all converts into capacity, the chip industry will choke.
There are sunny skies ahead. The 18th global semiconductor industry upcycle has started. But, don’t throw away the umbrella. There are squalls and showers ahead too! Enjoy the inevitable brickbats — Penn’s -22 percent forecast was wrong. ‘Number’ was hostage to math, but the analysis was spot on. No-one else forecast negative growth. If vou value forecast number, more than the analysis, we too could keep changing. Our forecast is homing in on the final number. That’s ego, not substance. We only update ‘the number’ when something of substance happens, like now!
Update on global semiconductor and automotive industries
Industrial Info Resources (IIR) organized a seminar on global semiconductor and automotive industries.
Despite global economic and banking instability, there is an effort to de-centralize semiconductor manufacturing away from Asia continues. Hefty sums are being spent in North America and Europe to re-shore manufacturing, and to increase capacity as shortages that plagued globe throughout the pandemic continue to cause problems. Automotive sector continues to push forward on its path to electric vehicles, as well. Billions are being allocated across all parts of the globe to switch manufacturing from fossil fuel to EV automobiles. There is also support for production, such as lithium-ion batteries.
Semiconductor sector and reshoring
David Pickering, VP of Research, Industrial Manufacturing, IIR, said the global semiconductor players have been investing heavily around the world. There are currently 1,694 global active semiconductor projects, worth $660.6 billion. We are now witnessing an increased demand for semiconductors. More reshoring is happening, along with geographical diversification. The industry still needs to deal with shortages and potential labor issues.
Looking at global future spending by region for semiconductors, of the 844 projects ongoing, worth $206,040 million, Asia has over 590 projects worth $96,938 million in 2023. North America has 194 projects worth $71,002 million. Europe comes next with 48 projects worth $38,043 million. The number of projects decline to 417 in 2024, worth $78,686 million, to 77 projects worth $76,380 million in 2025, and 29 projects worth $39,184 in 2026.
Semiconductor projects with kick-off in Aug. 2023-July 2024 have a total count of 623, worth $171,090 million. There are 291 grassroot projects, 199 plant expansions, 122 other in-plant capital, and brownfield projects.
Some of the global semiconductor project investments has players such as Intel, Micron, TI, TSMC, GlobalFoundries, Vedanta Resources, Samsung, STMicroelectronics, Yuanheng Hainan Semiconductor, Infineon, SK Holdings, Hanwha Group, Chint Group, Toyota Motor, Wolfspeed, LG, EMP Shield, Skywater, etc. They are working on developing processors, memory, and components.
Energy and process issues
Looking at ESG in industrial manufacturing, and semiconductors, we have energy issues. We need to reduce energy consumption with new technology. The semiconductor industry needs to change the energy sourcing to green alternatives.
Next come process issues. There are process improvements with new equipment, alternative chemicals to reduce environmental impact, and gas abatement, and gas recycling technologies.
80 percent of emissions come from process gases and energy consumption. As the chip size shrinks, energy requirements are going to increase dramatically. Last 20 percent of emissions are from the upstream suppliers, chemicals, and raw materials. Collaboration between supply chain and value chain has become essential.
Focus of North America
Discussing the semiconductor sector focus of North America, Ms. Angela Hudson, North American Research Manager, IIR, said that the CHIPS Act provides $52 billion worth of incentives. Reshoring to develop stable supply chain is paramount. Domestic supply chain development is a primary goal.
Higher-level technology chips are in high demand for AI data centers. Potential data centers that can revamp to support AI can drive massive demand for chips in the coming years. The long-term investment can also reach historic highs, possibly, crossing $1 trillion. USA also has projected shortage of 67,000 chip industry workers by 2030, such as computer scientists, engineers, technicians, etc.
Next, Pickering looked at the global semiconductor and automotive spending outlook. Drivers for new capacity microchip production can be handled by reshoring. The industry is securing the supply chain by bringing manufacturing to the end-product demand center. These are led by automotive, data centers, solar stations, and automation apps.
Data center growth is also stimulated by cloud computing and storage. There are requirements for automation, telecom, and processing capabilities. E-commerce distribution is also moving toward automation. We are also witnessing generative AI and large language processing.
About active US semiconductor investments, there are 126 projects worth $342.13 billion in total. 23 of the projects have investments worth over $1 billion. TSMC, Intel, TI, Micron, Robert Bosch are setting up projects on the US West Coast. In the Northeast/Great Lakes, we have Micron, GlobalFoundries, Intel, and Skywater. In the Mid-Atlantic/Southeast, there are projects from Wolfspeed, SK Hynix, Hanwha, Micron, EMP Shield, Integra Tech, and First Solar. In the SouthWest, there are TI, Samsung, GlobiTech, Coherent, Infineon, and 3Sun USA.
Automotive sector has issues
Next, we will look at the global active automotive projects spending by region. Currently, there are 5,044 projects worth $414.8 billion. North America is the leader, closely followed by Asia. Then comes Europe, followed by Latin America, Africa, and Oceania.
The automotive sector has several issues to contend with. There is an uncertain EV demand, charging network woes, grid support issues, supply chain issues, and start-ups survival. Asia and North America are driving the global future spending by region, followed by Europe and Latin America. Several projects are ongoing, led by grassroot, followed by plant expansion, and other in-plant capital. They are followed by brownfield and maintenance projects.
The 12-month rolling automotive projects by region is led by North America with 979 projects worth $57,794 million, and Asia with 925 projects worth $68,054 million. This is out of 2,284 projects worth $174,627 million for the world.
In the rolling 12 months, ICE assembly has 306 projects worth $34.5 billion. EV assembly jas 158 projects worth $23 billion. LIB transportation has 135 projects worth $73.2 billion. Tyre suppliers have 1,684 projects worth $43.7 billion.
EV investments
Investments in EV have been significant. About 10 million EVs were sold in 2022 worldwide. 35 percent increase is expected in 2023 with 14 million units likely sold. 5 million bbl/day reduction in crude by 2030 is expected due to EV adoption. 60 percent car sales will be EVs across China, USA, and Europe. 1.6 million US EV vehicle unit sales is forecast for 2023.
Tesla has been the runaway leader, with Q1-23 registrants of 155,360 out of total 255,304. Next highest is Chevrolet with 19,947. Other players include Ford, Volkswagen, Hyundai, Rivian, BMW, Kia, Audi, Nissan, Volvo, Subaru, Cadillac, etc.
In tailwinds, new entrants and new models are creating greater competition, which is good for consumers. Tesla has become the standard/universal charging plug for major players. Chip producers are catching up with production. Second- and third-generation vehicles utilize more AI features. Inflation Reduction Act (IRA) supports $12 billion in personal and commercial vehicle incentives.
In headwinds, charging infrastructure, battery duration, vehicle costs, and high borrowing costs, etc. hold back short-term adoption. In terms of profitability, cost parity with ICE vehicles could be a long way off. Startups are under pressure from legacy OEMs. Ford and GM are expected to triple share by 2026.
ESG in industrial manufacturing for automotive is gaining in importance. In EVs, the current battery (LIB) costs are too high, contributing to higher vehicle costs. Also, lack of charging stations leads to ‘range hesitancy among consumers.
For autonomous vehicles, cost per autonomous vehicle is currently around $400,000. The technology costs are too expensive right now. As for ride sharing, it is effectively used in large cities. As they become more usable and convert to EV, they can help reduce carbon emission.
Lithium-ion battery (LIB) supplies are currently worrisome. Access to processing of lithium is potentially problematic. LIB recycling has been ramping up, but is slow to grow. Cost per vehicle is also not affordable currently for the average consumer. Autonomous technology is still not there. Too many accidents are happening in testing. There is some concern from top executives that EV conversion will fail to sell well.
Status in North America
Ms. Hudson added that the LIB battery supply chain has seen investment improving in North America. CHIPS Act is helping alleviate the automotive supply issues. Consumer enthusiasm remains uncertain in North America though. Seven automakers JV plans to construct 30,000 charging stations in North America, worth $1 billion investment.
EV tax credit and grant for clean heavy vehicles is also there. Up to $7,500 income tax credit to lower- and middle-income consumers for new EVs, and $4,000 tax credit for previously-owned EVs is provided. Only vehicles whose final assembly occurs in North America will be eligible for tax credit.
The bill restricts vehicles with retail prices above certain levels from qualifying for the credit. The bill also prohibits manufacturers from claiming credit if vehicles contain minerals that were extracted, processed, or recycled by a foreign entity of concern, defined as state sponsors of terrorism or countries blocked by the Treasury Department.
In addition the bill creates a 30 percent tax credit for purchase of new clean commercial EVs. It provides $1 billion for clean heavy-duty vehicles like school/transit buses, and garbage trucks.
Looking at automotive investments across assembly and parts production, there are 1,278 active projects worth $48.97 billion. In the active EV battery plant projects, there are 159 active projects worth $105.12 billion.
In conclusion, both, semiconductors and automotive are booming. Spending is very unlikely to decrease in the near term. Supply chain issues also remain. Reshoring and near-shoring have been increasing. However, geopolitics plays an important role. Can the supporting industries keep pace?
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