Semiconductor industry performance a pleasant surprise: Dr. Wally Rhines

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The year 2018 is nearly upon us! And, who better than Dr. Walden C. Rhines, CEO and chairman of the Board of Directors of Mentor, a Siemens business, a leading industry personality, to provide us with an outlook for the global semiconductor industry!

Dr. Wally Rhines and I chatted about the global semiconductor and EDA industries, the Accellera Portable Stimulus Standard (PSS), and a host of other issues.
Wally

Semicon industry in 2018
First, how is Mentor predicting the global semiconductor industry to perform in 2018?

Dr. Rhines said: “The semiconductor industry performance for 2017 has been a pleasant surprise for most industry observers. The year is finally winding down, with the expectations for growth in the low 20s on the average – nearly 3-4 times as much as most observers had predicted only one year ago.

“Unit growth has consistently been 7-9 percent in recent years since the great recession. However, ASPs have been pretty consistently declining until 2017, when they were driven up mostly by memory prices for DRAMs and FLASH. Memory, once again, is behind the 2017 boom cycle. However, the rest of the IC business has also been relatively strong with growth in the higher single digits (7-8 percent), which is stronger than we have experienced in recent years.

“Memory prices are expected to soften as additional capacity comes on-line in 2018, especially as the year continues into the second half. However, the remainder of the non-memory semiconductor market should continue to have strong performance similar to 2017 (~7-8 percent) as the market fundamentals remain strong.

“Over the last several years, the semiconductor industry has experienced a wave of consolidations. I believe that we are between major waves of growth that are typical of the semiconductor industry. Historically, new semiconductor growth is ushered in by new applications that become possible when the cost per function, or some other new capability, makes the new application possible.

“In recent years, the cost per transistor for semiconductors has decreased more than 35 percent per year, just as it has, on average, for most of the last 60 years. It’s likely that continuation of this trend will, in fact, enable future waves of new semiconductor applications.

“Packaging, as well as package/chip simulation, continue to be important issues. Next generation simulation, verification, and analysis for multi-chip packaging configurations is now available. Now, designers of chips can intelligently analyze the packaging and pin-out configurations that will be most effective for cost and performance, based on a steady flow of data between the packaging engineer and the chip designer.”

EDA segment in 2018
And, how is the EDA segment looking in 2018?

According to Dr. Rhines, the EDA License and Maintenance is having a strong year in 2017. The annual growth is over 9 percent through the most recent four quarters with available data (Q3 2016 – Q2 2017).

He said: “The Semiconductor IP component of EDA achieved growth of nearly 17 percent overall, over the same period, as would be expected since Semiconductor IP is an important part of the supply chain for the broader semiconductor market.

“With expectations for the world economy and the overall semiconductor industry remaining strong, I expect semiconductor investment into design to also remain strong. EDA License and Maintenance is accounted for within the semiconductor company R&D expense budgets. Those budgets have a strong correlation to EDA License and Maintenance revenue. Therefore, I expect similarly strong growth in 2018.
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What’s with names and numbers?

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What’s with names and numbers? It all started when a friend casually asked me whether I was destined to win so many awards! Now, I don’t even know why I have won so many awards for my blogs. Actually, it was 17 at last count, 16 international and one national. We did a numerology report. A table is given here for those interested.
Numbers
First, my full name. PRADEEP CHAKRABORTY.
PRADEEP = 7+9+1+4+5+5+7 = 38/2
CHAKRABORTY = 3+8+1+2+9+1+2+6+9+2+7 = 50
So, PRADEEP CHAKRABORTY, added together is 38+50 = 88+8 = 16. And, 1+6=7.

Now, my favourite subject: SEMICONDUCTORS.
SEMICONDUCTORS = 1+5+4+9+3+6+5+4+3+3+2+6+9+1 = 61 – 6+1 = 7.
ELECTRONICS = 5+3+5+3+2+9+6+5+9+3+1 = 51 = 5+1 = 6.
ELECTRONIC = 5+3+5+3+2+9+6+5+9+3 = 50 = 5+0 = 5
COMPONENTS = 3+6+4+7+6+5+5+5+2+1 = 44 = 4+4 = 8. Total” 5+8 = 13/4.
TELECOMMUNICATIONS: 2+5+3+5+3+6+4+ 4+3+5+9+3+1+2+9+6+5+1 = 76 = 7+6 = 4.

Three things are very clear! One, semiconductors has ALWAYS been my favorite for a number of reasons. The first reason is very simple – my name and the subject — 7 and 7, match! Two, electronics comes very close, and it also, somehow, runs the world. Three, so does the electronic components, but as the number 4 suggests, it is a subject difficult to grasp. The same applies to telecoms, as well.

Don’t agree with me? Well, as a question: please ask your friend: what does your phone do? He/she will come up with a long list. If you rephrase the question as to: what node is the platform (for a device) based on, the answer will be ‘silence‘! 😉

Okay, this is getting a bit boring! 🙂 Let’s have some fun with sports, eh?

ATHLETICS: 1+2+8+3+5+2+9+3+1 = 34/7. Difficult, but very entertaining. To excel, you need to work very hard.

BADMINTON: 2+1+4+4+9+5+2+6+5 = 38/2. A game favoured by romantics. Elegant to watch. Smash it! 😉

BASKETBALL: 2+1+1+2+5+2+2+1+3+3 = 22/4 – Fast paced. You need to be fast paced too!

BOXING: 2+6+6+9+5+7 = 35/8. This is a game for tough men and women who can take a pounding.

CHESS: 3+8+5+1+1 = 18/9. Played by few. Understood by few.

CRICKET: 3+9+9+3+2+5+2 = 33/6. A game for the masses. Interesting, that there are a handful of test teams in the world. Mostly, former British colonies.

FOOTBALL: 6+6+6+2+2+1+3+3 = 29/2. Very popular, but rough game, for the masses.

JUDO: 1+3+4+6 = 14/5 = Again, for the masses. Few practitioners in India, though

GYMNASTICS: 7+7+4+5+1+1+2+9+3+1 = 40/4. This one’s tough, but makes for great watching.

SWIMMING: 1+5+9+4+4+9+5+7 = 44/8. A tough game. Prefers folks who are very fit!

TAE-KWAN-DO: 2+1+5+2+5+1+5+4+6 = 31/4. Same as above.

TABLE TENNIS: 2+1+2+3+5+2+5+5+5+9+1 = 40/4. Fast paced! Same as above.

TENNIS: 2+5+5+5+9+1 = 27/9. A sport for the masses, featuring gladiators.

VOLLEYBALL: 4+6+3+3+5+7+2+1+9+9 = 49/4. This one’s needs tremendous agility. Well, which game doesn’t?

WEIGHTLIFTING: 5+5+9+7+8+2+3+9+6+2+9+5+7 = 77/5. For supermen and women.

Let’s look at sports. SPORTS: 1+7+6+9+2+1 = 26/8.

Sports itself, is a difficult discipline. So, how can anyone excel in any one among these sports, or well, in life? Simple. By doing hard work! 🙂 It all comes to those individuals who work hard nearly all their life.

Friends, I encourage all of you to try out your full name and full date of birth, (eg. 01-02-2011) separately, and respectively, to see where you stand in life! 🙂

Be aware! Numbers DO NOT make any man or woman. Only HARD WORK does! 🙂 You need to be agile, have the necessary skills, and speed, to excel in any field!

AGILE: 1+7+9+3+5 = 25/7.
SKILLS: 1+2+9+3+3+1 = 19/1.
SPEED: 1+7+5+5+4 = 22/4.
HARD WORK: 8+1+9+4+5+6+9+2 = 43/7.

Finally, in case I’ve made any mistakes, while adding up the numbers, kindly forgive me. I am NOT an astrologer. 🙂

Movie on my life? Naahh!! ;)

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Pradeep
That’s me! 🙂

This is extremely funny! An acquaintance recently called to check whether I would be interested in having a movie made on my life! Before he could finish, I replied, NO!

Some thoughts! First, why make a movie on me, a nobody? Two, I haven’t even achieved anything great like any sportsperson! Three, who will even watch the movie? Four, who will act my role??

The acquaintance said that I had won nine global awards for my blog, and that is a very great achievement! Hmmm, I have won eight global awards and one Indian award, that too from the film industry, of all people! 😉

In fact, I have won 21 awards so far, four at Global Sources, Hong Kong, and 17 for my blogs, including nine for Pradeep’s Point! However, I personally don’t think these would lead to any movie!

Come to think about it! So far, NO ONE in India has recognized my work, which is fine, given the lack of semiconductor- and electronics-related work and writings from India.

The one award that I did receive in India, was from the Indian film industry. I even recall asking my family: is everything all right with the Indian film industry? Why are they giving me this award??

Given the general lack of awareness, and well, the lack of overall support for me, at least, I can only think of three people who have supported me right through — Jo Kuo from Taiwan, and Usha Prasad and Aanchal Ghatak from India, besides my immediate family.

I don’t even want to mention the lack of ANY support from my relatives. Not their fault, as semiconductors is tough for anyone to understand, right?

I would like to thank the entire Asian Sources Media, now, Global Sources, Hong Kong, and all the folks there for helping me understand the intricacies of telecom, electronics, and semiconductors, and of course, the Global Sources’ tutelage. My thanks to the global electronics and semiconductor industries as well, without whom this would not have happened.

There is an interesting remark on my Facebook from a friend. It says: “Semicon needs to be in the mainstream. Such a miniscule component, but, at the heart of technology. Without semiconductors, we wouldn’t have this easy life.”

Very correct! Hope everyone appreciates this hard fact!

So, what will I do with any movie on my life? 🙂 Enjoy, everyone! This is ridiculous! 😉

 

Evolving role of CISOs!

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F5 Networks recently unveiled a security report, a study, titled ‘The Evolving Role of CISOs.’ The study, done in collaboration with the Ponemon Institute, collected information based on interviews with senior-level professionals (CISOs and CISO-equivalent roles) from 184 companies in seven countries.

A key takeaway – there is a shift toward security as a business priority. Fifty seven (57) percent of the respondents say that their organizations have experienced big developments that are driving change in their attitudes about security programs. Next, 49 percent believe that their organization considers security to be a business priority. Cybersecurity exploits and material data breaches are contributing most significantly to the changing attitudes about IT security programs.

Some of the other takeaways include:
* CISOs believe in the importance of an executive-level security leader.
* Enforce policies that protect the organization from insider negligence.
* Assess the risks created by the Internet of Things (IoT).
* Hold third parties to a higher standard of security.
* Invest in technologies that enable the move from protecting the perimeter, to the protecting of the endpoints, applications and data over the next 24 months.

ParagParag Khurana, MD, F5 Networks, India and SAARC, said: “There is a changed security landscape. The cloud is rapidly transforming. Also, the enterprises are consuming applications very differently. Everything is now getting encrypted.”

According to the study, 72 percent of the attacks are on applications. There is 28 percent attacks on the user identities, and 44 percent attacks on the application itself. Even then, less seems to be happening to support this sector.

Till now, most of the security is network-centric. It is causing a shift in IT security. Today, the focus is on security from the applications point of view. F5 Networks promises to secure the access to your applications. F5 Networks is seeing more conversation on multi-cloud security.

According to the CISO report:
* With the number of cyber attacks on the rise, the role of the CISO will become even more critical.
* Current IT security strategy spanning a company is still very rare.
* Recognition of security as a business priority is still reactive.
* An IT security strategy is still very rare.
— 58 percent believe that IT security is a standalone function.
— 45 percent believe that security function does not have clearly defined lines of responsibility.
— 22 percent believe that security is integrated with other business teams in their organizations.

In India, 57 percent of the respondents say that there is a change in attitude due to the big developments. Next, 31 percent say that there will be more dependency on application security in the future, and 30 percent feel that there will be more dependency on end-point security in the future. Another 23 percent feel that there will be less dependency on network security in the future.

Things to do for CISOs
There are three things for CISOs to look at in future:
* On moving on to the cloud, what happens to the current security?
* How can multi-cloud environments work?
* How can they best protect the organizations from attack vectors that have now increased?

Enterprises definitely need to establish enterprise-class data centers, and have own control, and further extend that to hybrid models. Banking and financial services are the first movers to implement security. Next, the pharmaceutical companies are adopting security to protect their IP.

Design verification trends and role of emulation

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Sanjay Gupta, senior director of R&D, Mentor Emulation Division, Mentor, presented on the design verification trends and role of emulation.

Mentor2Verification needs are expanding beyond traditional functional verification. SoC power analysis, coverage closure and DFT validations are critical. Vertical market segment focus is crucial as verification needs are different for different verticals. Verification teams are global teams. Veloce platform addresses the modern verification challenges.

Talking about the design trends, ~31 percent of designs use over 800 million gates and ~20 percent use over 500 million gates.Next, 72 percent of designs contain embedded processors, and 49 percent designs contain two or more processers, while 16 percent designs have eight or more processors.

As for ASIC/IC completion to the original schedule, 61 percent designs were behind schedule in 2014, which increased to 69 percent during 2016. The number of required ASIC/IC spins before production had become seven spins or more in 2016.

Regarding verification trends, as for more design engineers vs. verification engineers, design engineers were growing at CAGR 3.6 percent, while verification engineers were growing at CAGR 10.4 percent, from 2007-2016. The ASIC/IC verification engineers were spending 39 percent of their time at debugging, 22 percent each at creating test and running simulation, and testbench development, and 14 percent time in test planning.

SystemVerilog was a clear leader at the ASIC/IC verification language adoption, while Accelera UVM was a clear leader at the ASIC/IC testbench methodology adoption trends.

In power and coverage, 72 percent more designs wre actively managing power in 2016 as against 59 percent in 2007. Among the power intent trends, the UPF 2x was a clear leader among notations used to describe power intent. Functional coverage is just nearly on par with code coverage, followed by assertions and constrained-random simulation, as far as the ASIC/IC dynamic verification trends are concerned.

Challenges for verification include larger, more complex chips, as well as the increasing software content. Transistor count for select ICs will likely reach 15 billion gates by 2022.

Vertical segments are facing constant innovation. In networking, SDN emergence is driving complexity, size, and port count. There is an increased importance of software. Networking is driven by Big Data, cloud and mobility.

Safety is critical verification for automotive design. Veloce delivers the functional safety verification. Emulation has moved to virtualization with Veloce2. Data-center friendliness and enterprise-level usage are prime. Veloce Strato has accelerated and moved on to the application age, and has a vertical market focus.

Crystal chip is the brain of the Veloce emulation platform. A chip is designed exclusively for emulation: fast compile and efficient, full visibility. The chip, system and software are architected together to optimize the emulation capabilities and productivity. The Veloce Strato offers the lowest cost of ownership.

Veloce power app offers low-power verification at SoC level where power controls come from the application software, handles large SoC (RTL/Gate) with full visibility, performs complete verification (e.g. OS boot) and shows accurate power numbers based on real switching activity.

You can also do low power verification with Veloce. There is broad UPF 2.x support and UPF 3.0 support is planned by the end of 2017. Veloce coverage app has comprehensive SVA assertion support, SV functional coverage, code coverage, standard UCDB support and merged with simulation UCDB, and flow to enable XML merge with other platforms.

Veloce structured around verticals

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Anoop Saha, Mentor, did a presentation on Veloce vertical solutions at the Emulation Conference in Bangalore.

MentorVeloce solutions are used across networking, storage, multimedia, mobile, CPU, automotive and military aeronautics. Veloce is structured around verticals to be segment focused, identify and address segment specific challenges, and identify gaps early on.

Veloce solutions are connecting the DUT to the external stimulus. iSolve speed adaptors connect real-life systems with the emulator. The Virtualab peripherals — VirtuaLab is the software representation of a speed adaptor. The Veloce transactor library – Veloce compatible verification IP. Transactors (VTL) to integrate with users UVM testbench and lower the abstraction layer.

In networking, for instance, the network switch is driving complexity. There is shift to SDN driving chip size and high port counts. Next, 5G is also driving new technology
and standards. Veloce for networking is offering solutions on top of core emulation platform. The verification flow is expanding to include Lab system validation. As of now, SDN is said to be creating a methodology shift. Mentor is said to be the only vendor with a complete offering.

Verification can no longer ignore firmware. Emulation enables earlier firmware development. Software debug is done with Codelink. The Veloce power app is used for broad base analysis. Veloce also offers complete solution for multimedia.

There has also been an industry shift from spec to benchmark. Many new apps target benchmarks for mobile devices. Examples are the AnTuTu benchmark, Geekbench for CPU and GPU benchmark, GFXBench, a GPU graphics centric benchmark, Android smartphone and tablet benchmark, etc.

Emulation challenges 5G and beyond

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Mentor, A Siemens Business, held a one-day conference on emulation in Bangalore and Hyderabad. I am thankful to my friends, Veeresh Shetty and Montu Makadia, for helping me attend this conference.

MentorShankar Bhat, Director, Engineering, Qualcomm India Pvt Ltd, in his keynote, titled 5G and Beyond – Emulation Challenges, said that a shrinking time to market, and stringent DPPM requirements drive the future of verification. Verification scope will extend from just hardware verification to software enablement. The emulation footprint in verification will significantly improve.

He added that mobile has been making a leap every 10 years. Today, it is redefining everything by creating the connectivity fabric for everything and bringing new levels of on-device intelligence. The long-term vision is to transform everything through intelligent connected platforms.

There is likely to be $12 trillion worth of 5G-related goods and services in 2035. Mobile is driving technology nodes and innovation. Verification focus has expanded from functionality to coverage to performance, on to power to yield and DPPM (defective parts per million). There is an over 30 percent NRE (non-recurring engineering) cost on design verification and emulation.

Post silicon validation and software testing time has been shirking. The post silicon test content, and software need to be fully validated before silicon arrival. Here, emulation plays a significant role in software readiness.

Regarding the key verification challenges, these are:
* Increased complexity: Test counts have increased, and there are much complex power structure and power domains. Also, there are challenging performance scenarios.

* Long simulation time: Simulator efficiency is not scaled. It is not able to complete all verification before tape out.

* Software enablement: Software expects fully verified design and settings.

* Customer enablement and DPPM reduction.

Emulation advantages
Emulation has several advantages. It has significantly faster run time, 1000X+ compared to simulation. It mimics hardware and closure to silicon. There is quick test portability between platforms.

Emulation will play significant role in design qualification, in both pre- and post-silicon phases. Software enablement will help achieve faster time-to-market. The challenges faced by emulation are a high NRE cost, limited debug capability, compilation time is still high, there are limited power verification capabilities. There are higher hardware costs as well in gate level verification, as it is difficult to fit the full SoC into the FPGA.

Emulation will play a significant role in hardware and software co-simulation. Tool portability is key. Verification will use multiple tools and flow. There will be the interpretability of tests, and data will be critical. EDA companies need to develop cost-effective emulation platforms.

Earlier, welcoming the audience, Ruchir Dixit, Technical Director-India, Mentor, said that the status quo is uncomfortable. He compared the cost of laying a metro network in Bangalore, which can cost between Rs. 8,000-14,000 crores. For emulation, while, it was expensive, it was about time that developers got used to it.