Earlier this week, the ESD Alliance recently signed a memorandum of understanding (MoU) to join SEMI as a strategic association partner.
As a SEMI strategic association partner, the ESD Alliance will continue to act as the central voice of the semiconductor design industry to promote its value as a vital component of the global electronics manufacturing supply chain.
Bob Smith, executive director of the ESD Alliance said: “SEMI and the ESD Alliance (formerly EDAC) have had a good relationship for many years, but there was certainly no pre-existing timetable to bring SEMI and the ESD Alliance together.
“The increasing focus on system design, and the need for manufacturing and design to be more closely linked have certainly been drivers for collaboration.
“Several years ago, SEMI expanded their mission to span the entire electronics product manufacturing chain including design. Since the ESD Alliance represents design, it is a natural fit for the ESD Alliance to fill-in this part of SEMI’s mission.
“From the ESD Alliance standpoint, we benefit by being able to leverage SEMI’s global platform to build our community. Although, we have members outside of North America, we don’t have any local presence outside of the US. SEMI has offices across the globe that will allow us to bring our programs to other areas of the world.
“Next, it is a good fit in the increasing the collaboration that’s required between design and manufacturing. In fact, many of SEMI’s member companies had asked them for deeper access to the design community.”
Now that product design has been added the to electronics manufacturing supply chain, it will bring manufacturing and design closer together by being common members of SEMI, he added.
What are the ways that SEMI gives the ESD Alliance an opportunity to further expand its reach and grow to its full potential?
Smith added: “SEMI will help expand ESD Alliance’s global presence by offering programs and events in conjunction with SEMI’s worldwide platform. Expand programs/activities in education, collaboration and networking to our members and SEMI members that are interested in design.
“We can also grow the membership further by offering more programs and being active in other geographies beyond North America.”
Lam Research is a global leader in wafer fabrication equipment and services since 1980. It is the world’s second-largest semiconductor equipment manufacturer. Lam Research India was established for software development and support in 2000. Now, it provides hardware and software engineering design services, and plays a strategic role as part of the Product Engineering and Global Operations teams.
With a centre in Bengaluru that houses over 800 employees, Lam Research India’s proximity to the customer and supplier base in Asia, as well as 24×7 operational support enabled by the time zone difference with the headquarters in Fremont, CA, makes Lam India an indispensable part of Lam.
While Lam does not manufacture in India, there is a manufacturing support system here that is involved in planning, procurement and logistics that caters to a worldwide network of suppliers and manufacturers.
Innovation in semicon
Let’s look at the work and innovation happening in the semiconductor space
Krishnan Shrinivasan, MD, Lam Research (India), said: “It is a very exciting time to be in the semiconductor ecosystem. There is a full spectrum of next-generation solutions that we have been working on for about five years now. We have made some headway in its implementation. Non-volatile memory (NVM), which is about the cloud and data storage, driven by the amount of distributed sensors that are collecting data that needs to be stored and monetized, has possibly experienced the highest growth.
“Another key transition is from two-dimensional architecture to a three-dimensional architecture. In a two-dimensional architecture, one is constantly working on shrinking, but on a single dimension. Now, we have an opportunity to continue to work on shrinking, but, also have an almost unlimited opportunity to vertically scale. We are just in the third- or fourth-generation of an inflection that will create an impact for at least ten generations to come.
“In terms of the logic roadmap, it has already transitioned from the world of planar transistor to the FinFET transistor scheme, and there are further generations of innovation in FinFET technology and a new transistor structure in later architecture.
“This roadmap is a 5-10 year one for the logic industry. While the clearest roadmap for the industry from a technology point is in NVM, all of the elements, logic and memory, including DRAM and NVM, have a technical roadmap, which is as good – if not stronger – than it has been in many years.
“The semiconductor industry is looking at an exciting decade from a technological advancement point of view. The level of innovation is being driven by an increasing number of applications for predictive medicine, autonomous vehicles, innovations in space and climate. All this would not have been possible without silicon.
“The innovation in silicon enables the development of the application space. Application development and growth can only be sustained through continuous innovation in the semiconductor industry.”
Transformative memory tech
Next, what about transformative memory technology and its latest inflection
Shrinivasan added: “The semiconductor industry is facing multiple technology inflections simultaneously. Revolutionary approaches are being sought after in place of incremental or evolutionary scaling strategies in order to provide consumers with smaller, faster and power efficient devices.
“The current inflections are focussed on multiple patterning, FinFET, advanced packaging, and 3D NAND. NAND flash has traditionally been made using two-dimensional (2D) or planar methods. However, in order to squeeze in more memory capacity without having to shrink feature dimensions, 3D NAND provides a viable option. This memory structure is different therefore, it requires new fabrication methods which are being developed. 3D NAND is being driven by several important advantages that it offers, including its ability to deliver higher capacity with a lower cost per bit.
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According to an IC Insights report, the 47 percent full-year 2017 jump in the price-per-bit of DRAM was the largest annual increase since 1978, surpassing the previous high of 45 percent registered 30 years ago in 1988! This sounds interesting!
Are the rising DRAM prices aiding startup Chinese competitors? Are major DRAM suppliers somehow stunting global DRAM demand?
Dr. Walden C. Rhines, president and CEO, Mentor Graphics, a Siemens Business, said: “The DRAM business has always gone through cycles of imbalance between supply and demand. Growth of demand in the last 18 months has been stronger than growth of supply.
“Substantial investments in 2017 by the MOS (metal-oxide semiconductor) memory producers, as well as the addition of China to the supply chain, will correct this imbalance late this year or, at the latest, early next year.”
The DRAM price-per-Gb has been on a steep rise. To this, Dr. Rhines said: “It is a commodity, although there are many types of specialty DRAMs emerging. Because DRAMs are viewed by customers as a near-commodity, the price is heavily influenced by the availability of supply. Supply has been very tight during the last 18 months.
Malcolm Penn, chairman and CEO, Future Horizons, UK, added, “This is supply and demand, pure text-book economics.”
Are the rising DRAM prices opening the door for startup Chinese competitors?
Dr. Rhines noted: “Chinese competitors made their decision to invest in DRAM capacity long before the recent strengthening of demand in the balance of supply and demand. Of course, higher, or stable, pricing may make it easier for new producers to absorb the costs of ramping up new capacity and developing experience with a new technology.”
Malcolm Penn agreed: “Potentially yes, and to anyone else. Coca Cola were contemplating building DRAMs in the 1990s. DSRAM market boom, again, pure text-book economics. Whether or not they succeed is an entirely different matter. If the Chinese do enter the market, can they then survive the inevitable downturn and cycles? That remains to be seen!”
Can the startup Chinese DRAM producers field any competitive product soon? Dr. Rhines noted: “They probably can. But, they will have to develop a production base of “learning” to reduce cost, improve yields and maybe even reliability. This will take some time.”
Penn added: “Technically (i.e., meeting the spec), probably, yes. Reliability, probably no, for the Tier 1 customers (that will take several years to build up the production experience). Cost, definitely not!
“Their small fab scale and late learning curve start means that their die cost will be sizably higher than those of Samsung and SKH, and also Micron. Plus, their yields will be lower. Then, there’s the deep cash pockets issue to fund these ongoing cost disadvantages.”
In a separate situation, some 300mm fabs closing, for example, ProMOS. Dr. Rhines said: “It’s because of an imbalance of supply and demand for the products they make, thus limiting their profitability. It could also be because they don’t see an adequate investment return from the expensive new capacity investments, and therefore, find it more attractive to phase out some of their existing capacity.”
Malcolm Penn felt that the fabs were too old and technically obsolete.
Finally, are there more IC companies making transition to fab-lite or fabless business model?
Penn noted: “There’s no-one left to change! Everyone’s now fablite or fabless, except for Intel and Samsung (logic) and the memory manufacturers.”
Dr. Rhines said: “Based upon the growth of foundry revenue vs. total semiconductor revenue growth, there must be a continuing transition of capacity away from IDMs toward foundries. In addition, IDMs like Samsung are finding it economic to build the foundry business to increase the volume base of products that utilize their technology and capital investment.”
Victor Peng, president and CEO of Xilinx Inc. unveiled his vision and strategy to enable the “adaptable, intelligent world.” Xilinx moves beyond the FPGA to deliver a completely new category of highly flexible and adaptive processors and platforms that will allow for rapid innovation across a wide array of technologies.
Peng’s strategy involves three key points:
* Emphasis on data center acceleration.
* Accelerating growth in core markets.
* Introducing the Adaptive Compute Acceleration Platform (ACAP).
Let’s find out what’s the new innovation around data center acceleration.
Peng said: ” In a data center, there are three areas that need to be in acceleration — compute, storage, and network. Xilinx already provides FPGA-based acceleration solutions for storage and network. A recent major trend is compute. Many data center users would like to use compute resource for a broad set of applications in the emerging era of Big Data and artificial intelligence, like video transcoding, database, data compression, search, AI inference, genomics, machine vision, etc.
“These applications are not fit for the CPU architecture. So, markets need to have an application-specific acceleration solution.”
Next, how is Xilinx looking to accelerating growth in core markets? Peng added: “In the core market, it is not direct-related acceleration. All Core markets that Xilinx has highlighted are important for our current and future businesses. Xilinx keeps investing in these areas as well. Of course, these applications will use cloud/data center for their businesses. Xilinx Acceleration solution also helps them to provide adaptable compute acceleration platform.
Lastly, what is the Adaptive Compute Acceleration Platform (ACAP), and the range of applications and workloads for ACAP!
Peng noted, “ACAP will cover a broad set of applications in the emerging era of big data and artificial intelligence, like video transcoding, database, data compression, search, AI inference, genomics, machine vision, etc.”
As for the outlook for the global semiconductor industry in 2018, Xilinx declined to comment. However, some analysts would have an opinion.
This is a bold title, right? The Union Government of India is on its way to achieving the 175 GW target for installed renewable energy capacity by 2022. By November 2017, a total of 62 GW renewable power had been installed, of which 27 GW were installed since May 2014, and 11.79 GW since January 2017.
India is said to have achieved historic low tariffs for solar (Rs. 2.44/ unit) and wind (Rs. 2.64/ unit) through transparent bidding and facilitation. India also attained global 4th and 6th position in global Wind and Solar Power installed capacity.
Now, India has laid down an ambitious bidding trajectory for 100 GW capacity of solar energy and 60 GW capacity of wind over the next three years. Read more
Data breaches are a worldwide epidemic. Consider those that are most affected: two-thirds of Americans (198 million); half of Filipinos (55 million) and half of South Africans (30 million).
This reflects a sorry state of security in information technology (IT). As an industry, we have failed to adequately secure people’s data. The supply chain, which accumulates everything from customer and supplier data to financial figures, can be a particularly tempting target.
Everyone is affected, and no-one is immune. Recent hacks have included:
Corporates / large business (Accenture, TalkTalk, Verizon)
Small and midsized enterprises (Forever 21, Panama and the Paradise Papers)
Non-profits (the Red Cross Blood Bank)
Political parties (RNC)
Governments (South Africa, Philippines)
According to Malcolm Penn, CEO, Future Horizons, UK, the global semiconductor industry will see 21.1 percent growth and is likely to reach $499.973 billion in 2018! “Year 2018 will see a continuation of the growth with our official forecast at 21 percent,” said Penn. There will be further double digit growth, barring economic collapse. This recovery has nowhere near yet run its course.
In 2017, the global semiconductor industry grew 22 percent hitting $413 billion ($415 billion upside).
The 2018 capex drivers include node migration from 16nm/14nm To 10nm/7nm logic nodes, 3D NAND, where Samsung alone will spend a staggering $14 billion, following $26 billion total In 2017, including 3D NAND, DRAM ($7 billion) and foundry ($5 billion).
China remains a hotbed of activity in fab equipment spending, with multinational and domestic chipmakers building new fabs. EUV lithography is moving closer to production. Traditional lithography with multiple patterning will dominate front-end equipment makers demand. 200mm fab capacity will remain tight in 2018, prompting the need for 200mm equipment, but 200mm tools will be hard to find.
Entering 2018, a global financial crisis is unlikely. However, China debt and new borrowing is worryingly high. Any slowdown in China growth likely to impact elsewhere.
There is also a potential risk of 2007-09 Eurozone crisis. Big economy with slow growth/high public debt loses market confidence and/or needs bail out too big for Germany to stomach. Middle East conflicts could easily cause oil prices to soar, leading to recession in developed economies.
Further, central banks could trigger downturn. There can also be UK/EU/Global Brexit peripheral economic damage and fallout. No deal is better than a bad deal political brinkmanship. Forecast rests on assumption that major policy mishaps are avoided, and there are positive ongoing economic relationship between UK/EU. There is no significant increase/change in global economic barriers.
As for technology trends, Moore’s Law is still shrinking, and the hype’s exploding. There is still more hype than substance even in technical conferences. In logic devices, silicon area is ceasing to be the prime cost setter. Advances in design (using variance tools) and production (using metrology) mean that yields now so good that it can be worth using a larger die to remove a few process steps.
The ‘X nm’ or ‘node Y’ designations are becoming increasingly irrelevant. Many IC designs are so interconnect limited that smallest transistors are only needed in critical areas of speed or power. Intel pulled away a little due to better metallisation process. Samsung and TSMC are fast followers, but definitely need some divergence in processes again – so they are no longer clones of each other.
The exception is GlobalFoundries. As the smallest company, they need to focus on a single process. Others, including China, don’t spend enough on process R&D. Intel’s 10nm node is the first logic process to exceed the 100 million transistors per sq mm mark. There is still a 12-layer metallisation process, plus Fin and contacted gate. The industry seems to have stalled at 12-layers of metal. Is it impossible to reach layers higher than this, without actually reducing density?
Intel used cobalt for the first two layers of metallisation where all the short inter-gate connections are made. Cobalt provides a more reliable and repeatable conductivity in short interconnects where resistance of the contact dominates, not interconnect length. Another cobalt advantage is that it reduces electromigration. Instead of FEOL (front end of line), BEOL (back end of line) expertise will be the future semiconductor company key differentiator.
EUV (extreme ultraviolet lithography) is now cost effective. There will be new techniques with immersion being used at 10/12nm and beyond. Most layers will stay with 193nm immersion lithography, wherever possible.
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