CHIPS Manufacturing USA purpose: accelerate discovery to production
Biden-Harris Administration has issued a Notice of Funding Opportunity (NOFO), in USA, seeking proposals from eligible applicants for activities to establish and operate a CHIPS Manufacturing USA Institute focused on digital twins for the semiconductor industry.
CHIPS for America Program anticipates up to approximately $285 million for a first-of-its kind institute focused on the development, validation, and use of digital twins for semiconductor manufacturing, advanced packaging, assembly, and test processes.
Digital twins are virtual models that mimic structure, context, and behavior of a physical counterpart. CHIPS Manufacturing USA institute is the first Manufacturing USA institute launched by the Department of Commerce under the Biden Administration.
CHIPS Manufacturing USA Institute Proposers Day was held recently in Rockville, USA.
Digital twin
Mike McKittrick, Deputy Director, CHIPS Manufacturing USA, said digital twin is a virtual representation or model that serves as the real-time digital counterpart of a physical object or process. You can innovate faster and at less expense, access feasible for small and medium businesses, shorten process design and validation times, enhance training modalities, and improve facility performance.
Challenges include fragmentation – being able to produce and access the data needed to validate digital twins and power machine learning and AI tools. Lack of trust – strategic industry collaboration requires neutral convener to build trust and bring all parties to share risks and rewards of working across boundaries. High barrier to entry – significant financial investment, which is out of reach for small and medium-sized manufacturers.
Semiconductor manufacturing process flow involves deposition, inspection, photoresist, lithograph, etch, advanced packaging, etc.
Complex manufacturing involves co-design: function, process, materials, tools, etc., 1,000+ process steps, 70+ masks, hundreds of materials, and hundreds of different tools. Digital twin enables collaborative development across the country, creating new opportunities for participation. It speeds innovation in new materials, tools, processes. It can leverage emerging AI technology to help accelerate the innovation in manufacturing and co-optimization. It significantly reduces costs by improving capacity planning and production optimization.
Collaboration is critical for success! We need active participation from a wide-range of organizations, network of Manufacturing USA Institutes, CHIPS R&D Programs, and relevant federally-funded efforts. We encourage you to begin identifying your individual contributions to the ecosystem, as well as partners, who can help accomplish the vision and goals of the CHIPS Manufacturing USA Institute.
NOFO overview
CHIPS Manufacturing USA institute NOFO Overview was presented by Eric Forsythe, Director, Manufacturing USA. CHIPS Manufacturing USA Digital Twin Institute has the vision of enabling seamless integration of digital twin models into US semiconductor manufacturing, advanced packaging, assembly, and test industry, enabling the rapid development and adoption of innovations, and enhancing domestic competitiveness for decades.
CHIPS Manufacturing USA Institute will foster a collaborative environment within the domestic semiconductor industry, enabled by shared facilities; support industry-led solutions through funded research projects; accelerate technology towards commercialization through significant co-investment; and enable digital-twin workforce training.
CHIPS Manufacturing USA Institute objectives include convene stakeholders across semiconductor production ecosystem, improve state-of-the-art in manufacturing-relevant digital twins, significantly reduce cost for US chip development and manufacturing, improve development cycle times of semiconductor product innovation, advance digital twin-enabled curricula for training a domestic semiconductor workforce, and create a digital twin marketplace for industry to access digital models.
CHIPS R&D will invest up to $285 million in federal funds into four operational areas. These are: stand up, initial performance, advanced performance, and transition planning.
OA1 is institute operations. Establishing an Institute management and governance strategy, to include plans for outreach to a broad group of potential members. OA 2 is shared capabilities. Operating or providing member access to physical and virtual facilities, as appropriate. OA 3 is industry solutions. Developing and supporting an Institute-funded portfolio of projects, to either improve the capabilities of digital twins or to impact real-world operations. OA 4 is workforce training. Projects to either train the workforce to use digital twins or to leverage digital twin technology to deliver EWD services to diverse audiences of trainees.
A key goal of the CHIPS Manufacturing USA Institute is to have a significant impact on the semiconductor industry. CHIPS R&D is committed to building strong communities that share in prosperity of the semiconductor industry, as well as ensuring that taxpayer investments maximize benefits for the US economy.
CHIPS R&D strongly supports inclusion, diversity, equity, and access, and firmly believes that semiconductor industry cannot succeed unless all Americans have an equal opportunity to fully participate, including individuals from under-served communities.
CHIPS R&D understands that the semiconductor companies can reduce their environmental impact, improve potential for domestic manufacturing, and further their competitive advantage by helping customers meet environmental goals.
In its evaluation and selection processes, CHIPS R&D will consider how proposed Institutes will create broader impacts. Applicants should familiarize themselves thoroughly with the eligibility requirements within the NOFO 2024-NIST-CHIPS-MFGUSA-01, Section 3. Construction activities are not an allowable cost under this program. However, costs related to internal modifications of existing buildings that would be necessary to carry out the proposed research tasks may be allowed, at NIST discretion. In addition, recipients and sub-recipients may not charge profits, fees, or other increments above cost to an award issued pursuant to this NOFO.
Mandatory concept papers are due Jun. 20, 2024. Following concept paper evaluation, applicants will be invited to submit full applications, which are due September 9, 2024. CHIPS R&D may publicly release successful concept paper applicant names to facilitate re-teaming. Full applications will undergo evaluation.
The concept paper narrative is a 20-page document that includes an Institute Impact Statement, Institute Management and Governance Strategy, and an Institute Investment Strategy, containing education and workforce development plan, market transformation plan, and shared capabilities infrastructure plan.
Concept paper evaluation criteria has relevance to economic and national security, project management, resources, and budget, overall scientific and technical merit, transition and impact strategy, and education and workforce development. Review of the concept papers, selection, and notification to applicants is expected to be complete on or about Jul. 18, 2024.
Applicants invited after the concept paper stage will receive email instructions for submission of the full application. Submission of full applications is through grants.gov. Applicants and recipients must have an active registration in SAM.gov. The full application from applicants will be due on Sept. 9, 2024.
Accelerate discovery
Manufacturing USA Network was hosted by Mojdeh Bahar, Associate Director, Innovation and Industry Services, NIST. Manufacturing USA purpose is to accelerate discovery to US production. It aims to create an effective collaboration environment for applied industry research to bridge the gap from discovery to production.
Manufacturing USA Network has 17 institutes in 50 states and Puerto Rico, and growing. These are spread across electronics, materials, energy/environment, digital and automation, bio-manufacturing, etc. Our efforts help ensure what’s invented here is made here by a skilled American workforce.
We also have nine partner federal agencies, DoC sponsors one institute that serves as National Program Office. DoE sponsors seven institutes, and DoD sponsors nine institutes.
Later, an inter-agency panel was moderated by Christie Canaria Senior Policy Advisor, CHIPS R&D. The participants were: Bruce Kramer, Senior Advisor, ENG/CMMI, Tina Kaarsberg, Deputy Program Manager, DOE/EERE, Devanand K. Shenoy, Microelectronics Commons Executive Director, OUSD (R&D) / ASD (CT), and Stephen L. Luckowski, Program Manager, DoD MIIs, OUSD (R&E).
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