Policies and partnerships needed to support semiconductor startups

Semiconductor Industry Association (SIA), USA, organized a seminar on: Encouraging innovation: Policies and partnerships needed to support semiconductor startups.

Startups are a critical part of the semiconductor ecosystem, driving growth and innovation in the industry and exploring new frontiers of chip technology. Unfortunately, startups in the semiconductor sector face significant challenges and barriers to entry. Creative and ambitious policy solutions and expanded public-private collaboration are needed to help semiconductor startups grow and strengthen.

SIA, and Dan Armbrust from Silicon Catalyst—the world’s only incubator and accelerator for startups focused on semiconductor solutions— had a discussion on the opportunities and challenges facing semiconductor startups. They looked at the actions needed to reinforce and expand this important part of the semiconductor ecosystem.

John Neuffer, SIA President, said that we represent two-thirds of the global chip industry. Startups have been an essential part of the ecosystem. There are barriers to entry. We have to overcome them.

Dan Armburst said that company valuations and profitability has seen eight of the top 20 market caps in technology. It is the third most profitable industry. AI is profoundly hardware limited, and it’s the next gold rush. There are essential assets in a geopolitical sea change away from globalism.

Surge of investments are underway. There are CHIPS Act(s) in various countries and regions. VCs are wading back in as there are green shoots in deep tech and specialty funds. We have reasonable M&A and IPO opportunities for startups. Chiplets and advanced packaging can be advantageous for startups.

Semiconductor startups face daunting challenges. There is escalating cost of innovation, with prototyping access and costs. Sustained decline of VC for semiconductors is also there. Achieving product-market fit remains challenging. We have diminished customer appetite to award design wins to startups.

More research will not lead to commercialization, unless, we continue to build startup playbook. We must aggressively implement CHIPS Act investments for prototyping and startup funds with a sense of urgency. We can supplement with existing government programs and funding streams. We need to strengthen the startup ecosystem for translation to industry.

How it all started?
In 1990s, foundry business model was led by TSMC in Taiwan. In 2010s, we had Moore’s Law slowdown, rise of AI, and emergence of Chinese threat, and pricing power. In 2020s, pandemic chips shortages, CHIPS Act(s), China’s access restrictions, and GenAI are in action.

We have been witnessing consolidation and concentration in each segment. These are across chip design costs, DRAM, logic/foundry platforms, and equipment market. Also, scaling is in trouble, as the evidence of Moore’s Law slowdown. We need a very solid roadmap for next decade. We now need CMOS roadmap to <1.0 nm, along with the advances in EUV lithography, advanced packaging, and more backside power distribution.

Today, system companies, such as Apple, Google, Microsoft, Meta, Cisco, Huawei, along with IBM, Samsung, etc., are becoming silicon houses. China export controls and trade restrictions are stressing globalism. VC has also moved past semiconductors to software and services over the years. Investment has been around $6.5 billion, only 2.5 percent of $244.5 billion, in 2022.

VC investment and model
Venture capital investments in AI/ML have escalated. Majority has been in vertical apps. We had the first wave of domain specific accelerators / architectures for AI, largely around edge/cloud. There have been some investments in optical/photonics, in-memory, and neuromorphic chips.

Today’s VC model at a glance suggests goal is return 3-5x or 20-30 percent annual IRR over the 10-year life of the fund. Invest fund in 20-25 companies, which represent 0.1-1 percent of deal flow. Hits-driven business means, we need one-three firms to return 10-100x of investment. VCs are compensated 2 percent of fund annually for opex, and retain 20 percent (carry) of profits. Each startup funding round is lead by a new VC that sets the valuation and investing terms for others. For existing investors, exercising pro-rata rights is key. VCs raise follow-up funds based on track record of prior funds.

Silicon Catalyst role over the years.

VC model dictates where investments are made, and why semiconductors struggle. Investments in semiconductors are less attractive, compared to software and services. Higher capital is required, with longer time to revenue ramp. It has higher innovation failure rates, and longer time to liquidity, and lower returns.

Semiconductors requires extensive and specific due diligence, a skill mostly atrophied. Product-market fit is hard to predict based on early measures of traction and adoption. Incubator and accelerator services have helped startups in other arenas, apart from semiconductors. He said Silicon Catalyst accelerator model is tuned to semiconductor startup needs. Silicon Catalyst services are available from the industry’s ecosystem.

What’s coming up?
Within semiconductors, we have materials/process changes, new materials and devices, new equipment and processes, and EDA for emerging technologies, are coming up in the future.

For substrates, we have SiC, silicon-on-insulator, GaN, compound semiconductors, etc. For wafer fabs, there are patternable materials, planarization materials, gases, cleaning solutions, etc. Device performance has 2D semiconductors, graphene, diamond, ferroelectrics, spintronics, etc. Interconnects have metals, metal oxides, metal barriers, carbon nanotubes, isolation materials, dielectrics, etc. Packaging materials have solders, ceramics, encapsulates, thermal management materials, insulators, etc.

CHIPS Act
CHIPS and Science Act was signed into law in August 2022. Innovation gap is about the CHIPS Act R&D provisions. Gaps are in prototyping at scale, scale-up business model, startup funding, and government-agency coordination.

CHIPS Act Industrial Advisory Committee (IAC) was also set up later. IAC R&D gaps recommendations includes:

• Establish easily accessible prototyping capabilities in multiple facilities and enact the
  ability to rapidly try out CMOS+X at a scale that is relevant to industry.
• Create a semiverse digital twin.
• Establish chiplets ecosystem and 3D heterogeneous integration platform for chiplet
  innovation and advanced packaging.
• Build an accessible platform for chip design and enable new EDA tools that treat 3D
  (monolithic or stacked) as an intrinsic assumption.
• Create a nurturing ecosystem for promising startups.

CHIPStart UK is an example of a fast-moving government-led initiative. Last year, 11 startups were admitted for 9-month program. In Feb. 2024, there was call for second cohort applications.

Recommendations
It is recommended that USA executes what’s been authorized and appropriated with the CHIPS Act. Accelerate access to affordable prototyping capabilities for startups through the various CHIPS Act initiatives. This includes: NSTC for silicon, NAPMP for packaging, and Manufacturing USA for digital twin. DoD Commons (Hubs) for “lab to fab” – 8 regional hubs were launched in Sept. 23. We also have to Implement NSTC’s Innovation fund at minimum of $0.5B consistent with IAC and SCSP recommendations.

We can enhance existing SBIR/STTR and DIU programs with fast-track entrepreneur lane to 3x funding across NSF/DoE/DARPA/DoD/NIH. Leverage ongoing government initiatives by ensuring that startup investment and procurement are included (e.g., DoD NDIS (National Defense Industrial Strategy) and SBICCT (Small Business Investment Company Critical Technologies)), and DoE Office of Science (BES) and AMO funding and loan programs.

We can complement all this by attracting further private investment. Increase corporate VC (CVC) investments by 2x to provide signals to VC for early-stage startups with innovative technologies, especially in materials, metrology, processes and EDA.

We must commission the OSTP to establish means of collaboration with allied nations’ CHIPS Acts and ensure coordination across government agencies on initiatives that support startups. Increase the number of “hard tech” and specialty fund VCs by identifying and addressing gaps in incentives and policies via a neutral technology-based organization (e.g., MITRE, SRI, CoC – Council on Competitiveness). Enhance the capital gains provisions for entrepreneurs and investors that have long liquidity timelines (QSBS – Qualified Small Business Stock for capital gains).

Regarding EDA startups, they face similar problems to semiconductor companies. EDA historically has had significant startup and M&A activity. That has been a significant contributor to how the EDA industry has grown. There are major opportunities in chiplets and advanced packaging enablement, moving forward, and the use of AI to improve designer productivity.

Regarding agencies response to targeted and augmented SBIRS, he added that DoD and DARPA have modified and offered funding along these lines.