CHIPS Digital Twin Manufacturing USA Institute industry day conducted successfully
Chips.gov, USA, recently organized the CHIPS Digital Twin Manufacturing USA Institute industry day.
CHIPS For America offers $39 billion for incentives, $11 billion for R&D, plus CHIPS initiatives from the other agencies, such as DoD, State, NSF, and Treasury. CHIPS R&D programs include metrology, NSTC, NAPMP, Manufacturing USA Institute, etc.
CHIPS Manufacturing USA Institute looks to establish one institute with the potential for significant impact on semiconductor manufacturing. The focus is on digital twins with a minimum expected NIST commitment of ~$200 million over a five-year period. We anticipate a greater than 1:1 cost share. There is analysis of RFI responses, industry feedback, listening sessions across 15+ engagements, and technology opportunities across the CHIPS R&D portfolio.
What is a digital twin?
Specifically, a digital twin is a virtual representation or model that serves as the real-time digital counterpart of a physical object or process.
Benefits include innovate faster and at less expense, access feasible for small and medium businesses, enhance training modalities, shorten process design and validation times, and improve facility performance.
Challenges include being able to produce and access data needed to validate digital twins, and power machine learning and AI tools. We also need strategic industry collaboration, which requires a neutral convener to build trust and bring together all parties to share the risks and rewards of working across boundaries. Significant financial investment is also required, which is out of reach for small and medium-sized manufacturers.
CHIPS Manufacturing USA Institute on digital twins for manufacturing processes includes decision based on inputs from Manufacturing USA – RFI for semiconductor-related Manufacturing USA Institutes, CHIPS R&D workshops, PCAST and CHIPS IAC recommendations, and stakeholder meetings.
Digital Twins to revolutionize lab-to-fab transitions
Carol Handwerker, Head of Technology Strategy, CHIPS Program Office, spoke about Digital Twins to revolutionize lab-to-fab transitions. Semiconductor industry needs are CHIPS for America Industrial Advisory Committee, SRC roadmap for microelectronics and advanced packaging technologies, NIST semiconductor metrology and standards workshops, and IPC workshop on advanced packaging and roadmap for Industry 4.0.
Industrial Advisory Committee has established five key capabilities aimed to lower the barriers to entry and success for innovators. These capabilities will rely on a network of physical and virtual facilities.
There is need to establish easily accessible prototyping capabilities in multiple facilities and enact the ability to rapidly try out CMOS+X at a scale that is relevant to industry. Create a semiverse digital twin. Pervasive AI-enabled deep learning and model development can be applied to semiconductor R&D, design, and manufacturing. Establish chiplets ecosystem and 3D heterogeneous integration platform for chiplet innovation and advanced packaging. Build an accessible platform for chip design and enable new EDA tools that treat 3D (monolithic or stacked) as an intrinsic assumption. Finally, create a nurturing ecosystem for promising startups.
There is also a need to identify a small number of application-driven grand challenges to inspire innovation across the computing stack and spans fundamental materials, equipment and process R&D; design and manufacturing.
We can improve computing energy efficiency by 1,000X in a decade including leveraging domain specific accelerators and architectures, and innovation in materials, process and equipment technologies. We can develop and implement next-generation semiconductor manufacturing that is 10X more capital and human-resource efficient, and achieve net zero emissions with minimum waste and demonstrated sustainable materials in the next decade. CHIPS Act R&D programs will prioritize additional application grand challenges with advice from stakeholders.
In semiconductor manufacturing process flow, ultimate product is a device. Co-design involves function, process, materials, and tools. There can be 1,000+ process steps, 70+ masks, hundreds of materials, and hundreds of different tools. Digital twin is an AI-enabled model development through an integrated system of tools, materials, processes, sensors, algorithms, data analytics.
An example is Micron with use of AI at the edge in a smart factory. AI can improve the factory efficiency, deploy IoT platform for early detection with IoT sensors (image, acoustic, video), visually examine large amount of data, and automatically provide diagnostics.
For innovation in semiconductor manufacturing, development of digital twins for semiconductor prototyping and manufacturing is necessary. AI-based model development through integrated (materials, equipment, process), along with metrology/sensors and AI/data analytics is needed.
Level 1 is the fixed flow. It is for innovations in chip design, process optimization, and yield improvement. No new materials, equipment, or processes are required. In Level 2 or modified flow, we can introduce and optimize new materials, equipment, and processes. AI yields new models and interactions. Level 3 is integrated with discovery. We can integrate manufacturing processes into discovery. AI created new models and interactions to reduce time to manufacturing readiness.
Digital Twin Institute vision
Eric Forsythe, Technical Director, CHIPS Digital Twin Manufacturing USA Institute, talked about Digital Twin Institute. The vision is to enable seamless integration of digital twin models into US semiconductor manufacturing, advanced packaging, and assembly industries, enabling rapid adoption of innovations and enhancing domestic competitiveness for decades. The mission is to foster a collaborative environment within the domestic semiconductor industry, enabled by the world’s first shared semiconductor Digital Twin process validation facility, industry-relevant research projects, and digital-twin supported workforce training.
Digital Twin Institute objectives include reduce the time and cost for chip development and manufacturing. Accelerate adoption of semiconductor manufacturing innovations. Increase access to semiconductor manufacturing training through adoption of digital twin-enabled tools. And, expand access to digital twin tools, solutions and frameworks.
Digital Twin Institute approach has four steps. First, establish shared physical facility. Next, competitively fund industry-led technical and workforce development projects. Third, digital framework for interoperable data and models. Fourth, create a shared marketplace of digital twin models.
Building Manufacturing USA
Mojdeh Bahar, Associate Director, Innovation and Industry Services, NIST, spoke about Manufacturing USA. It has a vision of securing US global leadership in advanced manufacturing.
The mission involves connecting people, ideas, and technology to solve industry-relevant advanced manufacturing challenges, enhance industrial competitiveness and economic growth, and strengthen our economic and national security.
To accelerate discovery to US production, we can create an effective collaboration environment for applied industry research to “bridge the gap” from discovery to production.
Common institute design involves an industry-led public-private partnership, with typically, $70-120 million federal investment. At least 1:1 match with private funds, and neutral convening for collaborations. Each institute should develop a unique technology. Institutes also address the education and workforce skills gap for their technologies.
Manufacturing USA network currently has 17 institutes and growing. Electronics has AIM Photonics, NextFlex, and Power America. Materials has IACMI, ALift, and AFFVA. Energy/environment has Rapid, Remad, CESMII, and EPIX. Digital/automation has America Makes, ARM Institute, Digital Manufacturing & Cybersecurity Institute, and Cymanii. Bio-manufacturing has biofab USA, NIMBL, and BioMADE.
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