Global semicon industry poised to grow 21 percent in 2018: Malcolm Penn

According to Malcolm Penn, CEO, Future Horizons, UK, the global semiconductor industry will see 21.1 percent growth and is likely to reach $499.973 billion in 2018! “Year 2018 will see a continuation of the growth with our official forecast at 21 percent,” said Penn. There will be further double digit growth, barring economic collapse. This recovery has nowhere near yet run its course.

In 2017, the global semiconductor industry grew 22 percent hitting $413 billion ($415 billion upside).

Capex drivers
The 2018 capex drivers include node migration from 16nm/14nm To 10nm/7nm logic nodes, 3D NAND, where Samsung alone will spend a staggering $14 billion, following $26 billion total In 2017, including 3D NAND, DRAM ($7 billion) and foundry ($5 billion).

China remains a hotbed of activity in fab equipment spending, with multinational and domestic chipmakers building new fabs. EUV lithography is moving closer to production. Traditional lithography with multiple patterning will dominate front-end equipment makers demand. 200mm fab capacity will remain tight in 2018, prompting the need for 200mm equipment, but 200mm tools will be hard to find.

Entering 2018
Entering 2018, a global financial crisis is unlikely. However, China debt and new borrowing is worryingly high. Any slowdown in China growth likely to impact elsewhere.

There is also a potential risk of 2007-09 Eurozone crisis. Big economy with slow growth/high public debt loses market confidence and/or needs bail out too big for Germany to stomach. Middle East conflicts could easily cause oil prices to soar, leading to recession in developed economies.

Further, central banks could trigger downturn. There can also be UK/EU/Global Brexit peripheral economic damage and fallout. No deal is better than a bad deal political brinkmanship. Forecast rests on assumption that major policy mishaps are avoided, and there are positive ongoing economic relationship between UK/EU. There is no significant increase/change in global economic barriers.

Tech trends
As for technology trends, Moore’s Law is still shrinking, and the hype’s exploding. There is still more hype than substance even in technical conferences. In logic devices, silicon area is ceasing to be the prime cost setter. Advances in design (using variance tools) and production (using metrology) mean that yields now so good that it can be worth using a larger die to remove a few process steps.

The ‘X nm’ or ‘node Y’ designations are becoming increasingly irrelevant. Many IC designs are so interconnect limited that smallest transistors are only needed in critical areas of speed or power. Intel pulled away a little due to better metallisation process. Samsung and TSMC are fast followers, but definitely need some divergence in processes again – so they are no longer clones of each other.

The exception is GlobalFoundries. As the smallest company, they need to focus on a single process. Others, including China, don’t spend enough on process R&D. Intel’s 10nm node is the first logic process to exceed the 100 million transistors per sq mm mark. There is still a 12-layer metallisation process, plus Fin and contacted gate. The industry seems to have stalled at 12-layers of metal. Is it impossible to reach layers higher than this, without actually reducing density?

Intel used cobalt for the first two layers of metallisation where all the short inter-gate connections are made. Cobalt provides a more reliable and repeatable conductivity in short interconnects where resistance of the contact dominates, not interconnect length. Another cobalt advantage is that it reduces electromigration. Instead of FEOL (front end of line), BEOL (back end of line) expertise will be the future semiconductor company key differentiator.

EUV (extreme ultraviolet lithography) is now cost effective. There will be new techniques with immersion being used at 10/12nm and beyond. Most layers will stay with 193nm immersion lithography, wherever possible.

450mm fabs update
Giving an update on 450mm fabs, Penn said that G450C was cancelled in January 2017. The European 450 projects had all ended by this date. TSMC is believed to be purchasing some of the 450mm equipment from Albany. He said, “We believe that this will be used for 330mm wafers, currently the size for reconstituted wafers for wafer level packaging.”

The 450mm equipment would allow more interconnect or even active devices to be placed on the substrate for 3D multi-die devices. Square panels may also be investigated using the same equipment.

And, with 15 new fab projects underway or announced in China since 2017, spending on semiconductor fab equipment is forecast to surge to over $12 billion, annually, by 2018.

Future outlook
AI and Big Data are said to be the key new application drivers. Voice activation is maturing, and language translators will follow. The OEM players are changing, with best applications coming from companies with vast stores of data and cash. While 2018 is ‘safe’, the pendulum will swing back. There is a need to grasp the opportunities now!