Mid-term semiconductor industry update and forecast

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What’s the status of the global semiconductor industry in 2016? What are the forecasts for 2017? Malcolm Penn, chairman and CEO, Future Horizons, UK, presented his findings in London, UK, on Sept. 20, 2016.

Industry update
The IC ASPs are said to be the least understood statistic. The underlying ASP trend is 4-8 year cycle (2-4 Moore’s Law nodes). The crash is steep, and recovery has been punctuated by 1-2-year disruptions.

ASP recovery from penn12005 cyclical bust has been derailed by Lehmann, Euro Crisis, China, Brexit, much more. Penn recommended to beware the extrapolations and received ‘wisdom’,
especially on ASPs.

As for the current 2017 market outlook. there is an ongoing weak PC and smartphone market. The economy remains the industry’s biggest ever wildcard. Lack of industry confidence will bite everyone hard. The poor market growth is said to be the main driver for consolidation (M&A). The chip industry definitely needs a strong economy for growth.

Market forecast 2017
As for the semiconductor market forecast for 2017, the wheels fell off three times in March, Q3 and Dec. 2015. First, demand collapsed in March. This was followed by an ASP collapse and Jun-Sep hit Q3 sales value. The disastrous December made 2015 tip negative (-0.2 percent).

The wheels fell off again this time in Q1! Q3 has been holding up (despite Brexit uncertainty). The disastrous Q1 blew recovery hopes. It has been five years in a row that the market’s failed to recover. The overall economic confidence is clearly to blame.

The current 2017 market outlook is pegged at -1 percent, Lack of industry confidence will bite everyone hard. “Business as usual” means another bad year. As said earliet, the chip industry needs a strong economy for growth.

Tech trends
Well, Moore’s Law is still breathing, but Samsung and TSMC definitely made great efforts to catch up with Intel. Neither spends anywhere near enough on process R&D to research all of the possible next node options, thereby, relying on Intel and Imec Yield ramps are proving to be ‘challenging’, and ‘probably’ always will!

More on the Moore’s Law’, there is shrinking, that’s getting tough. E.g. TSMC FinFET transition has been step by step. Again, in 12nm FinFET, the first designs are now in tape out. However, all are still using the 20nm planar back end of line (BEOL) process. In contrast, Intel is now in early production of its full blown 12nm process and still has one generation lead.

There is a need to bring back a real International Technology Roadmap for Semiconductors (ITRS) roadmap, with classic gate channel width reduction no longer a realistic measure of IC process scaling. There needs to be separate scaling trends for the front (transistor), and BEOL (interconnect) has further muddied the waters. The industry desperately needs a new way to measure real scaling and properly compare different processes and process modes.

Now, N14/16 and N12/10 were easy, bur N7 gets hard! For N7 CMOS on production schedule for 2019, Intel and Imec have prototypes of most structure and material options. The N7 node will require III-V materials as well.

N5 CMOS node is harder still. It is the first node where quantum tunnelling effects are dominant. The prototype CMOS devices are already made by Intel and Imec. Vertical GAA (gate all around) structure is likely with FinET on SOI.

The less said, the better for the N3 node. Both heterojunction TFET and GNR (graphene nanoribbon) TFET offer complementary devices allowing continued use of CMOS design techniques. Intel definitely selected the heterojunction TFET. Either could be introduced at N5 if CMOS alternatives underperform or for very low power applications.

Beyond CMOS processes, there areSpintronics options. These include SpinFET, all spin logic, domain wall logic, Spintronic majority, nano magnet logic and Spin wave.

Looking at the “beyond CMOS” era of N2.25, N1.8 & N1.3 (maybe smaller), numerous device structures are in early research. Orbitronics may offer a simpler option than Spintronics with the BiSFET (bilayer pseudo-spin field effect transistor). A simple graphene-based device not dependent on the need for a band-gap could even come to market before Spintronics logic devices.

As for 3D Flash process challenge, Samsung’s ‘getting there’ Plus Intel’s the ‘dark horse’.

In FD-SOI, is the third process lucky? The original 28nm process was developed by STMicroelectronics and second-sourced to first GlobalFoundries, and then Samsung. The second generation shrink development has been aborted by STM. The second generation 22nm FDX process was launched by GlobalFoundries Dresden, and is an improved 28nm ‘squeeze’.

The third generation 12nm FDX process was launched (10nm FinFET performance and lower power/cost of 16nm FinFET). However, the first customer tape outs won’t be until H1-2019. Little is currently known how the process works and is made. There is unlikely to be a pure FD-SOI process/transistor as the classic FD-SOI transistor would not scale this far.

Let us also have an update on 450mm fabs. Europe’s now turned off all 450mm ‘life support’. Intel’s still “interested”, but remains low key for now. The 300mm process technology has moved on dramatically. 3D Flash needs might still ‘make 450’s day”.

As for an update on EUV, the 12 latest generation machines are now installed (plus six older ones). And, 24 more are due to be installed next year. New techniques with immersion are being used at 10nm. For 7nm, there will probably be used for Fin Cut stage. Most layers will stay with 193 immersion, wherever possible.

Key application trends
Now, let us look at applications. PCs are offering mobile features such as 3G/4G connectivity. Smartphones have cannibalised tablets. And, tablets are attempting to offer laptop-type (Office) applications (except Kindles). All of these areas are now fully saturated. The two biggest IC application markets have hit the wall.

IoT continues to be over-hyped and unclear. The industry and governments talk about IoT as if it were one space. IoT represents a range of opportunities. It will enable what will be‘the next big thing’. As of now, there is still no single IoT vision (or market!).

Connectivity is key, and so are Big Data and AI. Data analysis and connectivity are common denominators. However, they must pass the ‘common sense’ test.

AI’s getting better. Autonomous vehicles are probably the single biggest IoT market in the world. Automobiles now just ‘chips in a tin box’. For driverless/driver assisted cars, it’s all about ICs and system software.

The automobiles industry is already system-platform dominated. Customers who have put deposits on Teslas are out of the high-end BMW/Mercedes market. Autonomous cars means the right car on demand. Car ownership is becoming ever less appealing, especially in urban areas. It’s not so absurd to think of cars as disposable items.

As for M&A trends, each deal prompts others to consider M&A to gain share and remain competitive. The slowing revenue growth is forcing firms to seek other sources of growth. Semiconductor firms are now looking to M&A to take them into new areas of the value chain.

Future outlook
Automobiles are now just like any other system. It’s now all about ICs, system software and especially, Big Data. It is easier for the likes of Apple and Google to enter the autonomous car market (with production outsourced to TSMC and Foxcomm).

penn3Then, there’s the China factor. With new local (global) players, it is easier to roll out driverless cars there, than in the West. Uber is now estimated to be worth more than GM. Nothing’s going to stop the same disruption happening here. No industry is safe from semiconductor disruption. Not even the semiconductor industry itself!

Among pure-play foundries, there is a new start-up famine: The fabless era seems to be over. We are also witnessing a saturation in the fabless market. The foundry supply has seen TSMC as dominant. However, it can only grow with the market. Virtual OEMs are emerging. with firms such as Amazon, Apple and Google. Industry consolidation has reduced the overall market pie for the downstream providers and supplier choice for the upstream customers.

There are new industry dynamics. There is a huge design and data crunching capability with today’s ‘More Moore’ 14/16nm FinFET, let alone the imminent 10nm and 7nm derivatives. Together with widely innovative mixed-signal, MEMS and other ‘More Than Moore’ functionality means the chip industry can build chips to meet any realistic system needs.

Technology is no longer the system limiting challenge. This is driving a hugely disruptive change in the industry dynamics. There is a simultaneous change in customer base and needs. Firms such as Amazon, Google and Facebook are now entering the equation.
Big Data and server skills are opening new markets, from autonomous cars to robotics and drone delivery systems. Vertical (solution-driven) structures are now needed.

There are three golden rules of semiconductor economic challenge. These are:
Performance: Improving IC performance but without reducing costs does not generate sufficient new revenues.
Profits: Insufficient revenues in turn will not generate enough profits to pay for the next round of investments.
Scale: Failure to achieve a certain size (scale) means eventual inability to stay in business.

Fail on any one of these three and your business will not thrive, resulting in a misery of constant ‘restructuring & layoffs’ and eventual bankruptcy or fire-sale Acquisition

Change is inevitable. It brings disruption and opportunities. Moore’s Law is not just about shrinking geometries, but the systems and applications it enables to be built. The
automotive is the big IoT market and next in-line for change. However, it must need to pass the ‘common sense/must have’ test. The next 30 years will be very different. Only the bold and paranoid survive!


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